CXA1690Q Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza

componentes Descripción

Fabricante

CXA1690Q

Head Amplifier for Digital CCD Cameras

Sony Semiconductor 

CXA1690Q

2. Video signal processing system

Operating conditions

The video signal processing system has two modes: LIN signal mode and PBREC signal mode.

The video signal processing system operates in LIN signal mode when CAM/VIDEO is Low, and PB/REC is

High.

The video signal processing system operates in PBREC signal mode when PB/REC is High.

Video Signal Processing System Timing Chart

LIN mode

LIN input

2.5V

LINGCA output

9.5dB

VISP

2.1V

DRVOUT output

(CLPDRV output)

1.4V

(2V)

LIN signal mode

LINCLP:

The video signal enters the LIN pin. LINCLP sync tip clamps the input signal to allow full input.

The input signal level and frequency are respectively 500mVp-p (typ.) and DC up to approx. 7MHz.

LINAMP:

This is a 9.5dB gain amplifier.

VISW:

VISW switches between the LIN signal and PBRFC signal for the video signal processing system.

The signals are switched according to the input conditions of the CAM/VIDEO and PB/REC pins.

VISH:

The VISH is used for video signal processing system. It is a sample-and-hold circuit which synchronizes the

data read-in timing for the external A/D. The slew rate of the input signal for the sample-and-hold circuit can

be controlled by adjusting the input current to VSHI.

LOUTCLP:

LOUTCLP is a clamp circuit which operates when the LIN signal is output by the DRV. The clamp potential is

2V.

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