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ZN426E8 Ver la hoja de datos (PDF) - Zarlink Semiconductor Inc

Número de pieza
componentes Descripción
Fabricante
ZN426E8
ZARLINK
Zarlink Semiconductor Inc ZARLINK
ZN426E8 Datasheet PDF : 5 Pages
1 2 3 4 5
ZN426
ELECTRICAL CHARACTERISTICS
(at Tamb = 25°C and VCC = +5V unless otherwise specified)
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
Converter
Resolution
8
-
-
bits
Non-linearity
-
-
±0.5
LSB
Differential non-linearity
-
±0.5
-
LSB
Note 1
Settling time to 0.5LSB
-
1.0
-
µs
1LSB step
Settling time to 0.5LSB
-
2.0
-
µs
All bits ON to OFF
or OFF to ON
Offset voltage ZN426E8 and D
VOS temperature coefficient
Full-scale output
Full-scale temp. coefficient
Non-linearity temp. coefficient
VOS
-
-
2.545
-
-
3.0
5
2.550
3
7.5
5.0
-
2.555
-
-
mV
µV/°C
V
ppm/°C
ppm/°C
All bits OFF
All bits ON
Ext. VREF = 2.560V
Ext. VREF = 2.560V
Relative to F.S.R.
Analog output resistance
External reference voltage
RO
-
10
-
k
0
-
3.0
V
Supply voltage
VCC
4.5
-
5.5
V
Supply current
IS
-
5
9
mA
High level input voltage
VIH
2.0
-
-
V
Low level input voltage
VIL
-
-
0.7
V
High level input current
IIH
-
-
10
µA
VCC = max.
VI = 2.4V
-
-
100
µA
VCC = max.
VI = 5.5V
Low level input current
IIL
-
-
-0.18
mA
VCC = max.
VI = 0.3V
Internal voltage reference
Output voltage
VREF
2.475
2.55
2.626
V
Note 2 RREF = 390
Slope resistance
RS
-
1
2
RREF = 390
VREF temperature coefficient
-
40
-
ppm/°C
RREF = 390
NOTE 1: Monotonic over full temperature range.
NOTE 2:The internal reference requires a 1µF stabilising capacitor between VREF OUT and 0V and a 390resistor, RREF,
between VCC and VREF OUT.
INTRODUCTION
The ZN426 is an 8-bit D-A converter. It contains an
advanced design of R-2R ladder network and an array of
precision bipolar switches plus a 2.5V precision voltage
reference on a single monolithic chip.
The special design of the ladder network results in full
8-bit accuracy using normal defused resistors.
The use of on-chip voltage reference is pin optional to
retain flexibility. An external fixed or varying reference may
therefore be substituted. In this case there is no need to
supply power to the internal reference so RREF and CREF
can be omitted.
2

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