XE1209 Ver la hoja de datos (PDF) - Semtech Corporation

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XE1209

30 – 70 kH Ultra Low Power CMOS Transceiver

Semtech Corporation 

XE1209

Ultra Low Power CMOS Transceiver

7 PROGRAMMING / DATA INTERFACE

Programming the XE1209 is performed through the 3-wire interface SC, SD, DE, as shown below.

The enable signal DE goes low at the same time as the 8th falling edge of SC (that is, with a maximum delay

between each other of 100 ns). From the rising edge of DE, the XE1209 will sample the data present on SD at the

first 8 falling edges of SC, whatever is the following sequence on SC and SD. For a proper data transfer, the data on

SD must be stable for 5 microseconds before and after each falling edge on SC.

The values on SC, SD and DE (as well as RE) must be kept constant (either at VDD or VSS) during all the time

where the XE1209 has to be effective in modes M2, M3 and M4.

SC

SD

R0 R1 R2 R3 R4 R5 R6 R7

DE

7.1 CONFIGURATION REGISTER

The content of the configuration register is described below. The bit R0 is the first

received data during the 3-wire communication.

R7 R6 R5 R4

OSC TEST SENS P2

R3 R2 R1 R0

P1

P0

TR

FC

© Semtech 2005

www.semtech.com

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