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TE28F800C3BA90

Intel Advanced+ Boot Block Flash Memory (C3)

Intel 

Intel£ Advanced+ Boot Block Flash Memory (C3)

5.0

Security Modes

5.1

Flexible Block Locking

The C3 device offers an instant, individual block-locking scheme that allows any block to be

locked or unlocked with no latency, enabling instant code and data protection.

This locking scheme offers two levels of protection. The first level allows software-only control of

block locking (useful for data blocks that change frequently), while the second level requires

hardware interaction before locking can be changed (useful for code blocks that change

infrequently).

The following sections will discuss the operation of the locking system. The term “state [abc]” will

be used to specify locking states; e.g., “state [001],” where a = value of WP#, b = bit D1 of the

Block Lock status register, and c = bit D0 of the Block Lock status register. Figure 5, “Block

Locking State Diagram” on page 27 displays all of the possible locking states.

Figure 5. Block Locking State Diagram

Power-Up/Reset

Locked

[X01]

Locked-

D o wn4,5

[011]

Hardware

Locked5

[011]

WP# Hardware Control

Unlocked

[X00]

Software

Locked

[111]

Unlocked

[110]

Software Block Lock (0x60/0x01) or Software Block Unlock (0x60/0xD0)

Software Block Lock-Down (0x60/0x2F)

WP# hardware control

Notes:

1. [a,b,c] represents [WP#, D1, D0]. X = Don’t Care.

2. D1 indicates block Lock-down status. D1 = ‘0’, Lock-down has not been issued to

this block. D1 = ‘1’, Lock-down has been issued to this block.

3. D0 indicates block lock status. D0 = ‘0’, block is unlocked. D0 = ‘1’, block is locked.

4. Locked-down = Hardware + Software locked.

5. [011] states should be tracked by system software to determine difference

between Hardware Locked and Locked-Down states.

Datasheet

27

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