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TE28F800C3BA90

Intel Advanced+ Boot Block Flash Memory (C3)

Intel 

Intel£ Advanced+ Boot Block Flash Memory (C3)

4.3.1

Suspending and Resuming Erase

Since an Erase operation requires on the order of seconds to complete, an Erase Suspend command

is provided to allow erase-sequence interruption in order to read data from—or program data to—

another block in memory. Once the erase sequence is started, issuing the Erase Suspend command

to the CUI suspends the erase sequence at a predetermined point in the erase algorithm. The status

register will indicate if/when the Erase operation has been suspended. Erase-suspend latency is

specified by tWHRH2/tEHRH2.

A Read Array or Program command can now be issued to the CUI to read/program data from/to

blocks other than that which is suspended. This nested Program command can subsequently be

suspended to read yet another location. The only valid commands while Erase is suspended are

Read Status Register, Read Identifier, CFI Query, Program Setup, Program Resume, Erase

Resume, Lock Block, Unlock Block, and Lock-Down Block. During erase-suspend mode, the chip

can be placed in a pseudo-standby mode by taking CE# to VIH, which reduces active current

consumption.

Erase Resume continues the erase sequence when CE# = VIL. Similar to the end of a standard

Erase operation, the status register should be read and cleared before the next instruction is issued.

Datasheet

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