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TE28F800C3BA90 Ver la hoja de datos (PDF) - Intel

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TE28F800C3BA90 Datasheet PDF : 68 Pages
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Intel£ Advanced+ Boot Block Flash Memory (C3)
Table 6. Device Identification Codes
Item
Address1
Base
Offset
Data
Description
Manufacturer ID
Block
0x00
0x0089
0x88C0
8-Mbit Top Boot Device
0x88C1
8-Mbit Bottom Boot Device
0x88C2
16-Mbit Top Boot Device
Device ID
Block
0x01
0x88C3
0x88C4
16-Mbit Bottom Boot Device
32-Mbit Top Boot Device
0x88C5
32-Mbit Bottom Boot Device
0x88CC
64-Mbit Top Boot Device
0x88CD
64-Mbit Bottom Boot Device
Block Lock Status2
Block
0x02
DQ0 = 0b0
DQ0 = 0b1
Block is unlocked
Block is locked
Block Lock-Down Status2
Block
0x02
DQ1 = 0b0
DQ1 = 0b1
Block is not locked-down
Block is locked down
Protection Register Lock Status Block
0x80
Lock Data
Protection Register
Block
0x81 -
0x88
Multiple reads required to read
Register Data the entire 128-bit Protection
Register.
NOTES:
1. The address is constructed from a base address plus an offset. For example, to read the Block Lock Status
for block number 38 in a bottom boot device, set the address to 0x0F8000 plus the offset (0x02), i.e.
0x0F8002. Then examine DQ0 of the data to determine if the block is locked.
2. See Section 5.2, “Reading Block-Lock Status” on page 28 for valid lock status.
4.1.3
CFI Query
The CFI query mode outputs Common Flash Interface (CFI) data after issuing the Read Query
Command (0x98). The CFI data structure contains information such as block size, density,
command set, and electrical specifications. Once in this mode, read cycles from addresses shown in
Appendix C, “Common Flash Interface,” retrieve the specified information. To return to read-array
mode, issue the Read Array command (0xFF).
4.1.4
Read Status Register
The status register indicates the status of device operations, and the success/failure of that
operation. The Read Status Register (0x70) command causes subsequent reads to output data from
the status register until another command is issued. To return to reading from the array, issue a
Read Array (0xFF) command.
The status-register bits are output on DQ[7:0]. The upper byte, DQ[15:8], outputs 0x00 when a
Read Status Register command is issued.
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