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T5760 Ver la hoja de datos (PDF) - Atmel Corporation

Número de pieza
componentes Descripción
Fabricante
T5760
Atmel
Atmel Corporation Atmel
T5760 Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
T5760 / T5761
( Lim_min = 14, Lim_max = 24 )
IC_ACTIVE
Bit check ok
Bit check ok
Bit check
Dem_out
Bitcheck
counter
1/2 Bit
1/2 Bit
1/2 Bit
0
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4
TStartup
Startup mode
TXClk
TBitcheck
Bitcheck mode
Figure 11. Timing diagram during bit check
( Lim_min = 14, Lim_max = 24 )
IC_ACTIVE
Bit check failed ( CV_Lim < Lim_min )
Bit check
Dem_out
Bit–check–
counter
1/2 Bit
0
1 2 3 4 5 6 1 2 3 4 5 6 7 8 9 10 11 12
TStartup
TBitcheck
Startup mode
Bitcheck mode
0
TSleep
Sleep mode
Figure 12. Timing diagram for failed bit check (condition: CV_Lim < Lim_min)
( Lim_min = 14, Lim_max = 24 )
Bit check failed ( CV_Lim >= Lim_max )
IC_ACTIVE
Bit check
Dem_out
Bitcheck
counter
1/2 Bit
0
TStartup
1 2 3 4 5 6 7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
TBitcheck
Startup mode
Bitcheck mode
0
TSleep
Sleep mode
Figure 13. Timing diagram for failed bit check (condition: CV_Lim >= Lim_max)
Duration of the Bit Check
If no transmitter signal is present during the bit check, the
output of the ASK/ FSK demodulator delivers random
signals. The bit check is a statistical process and TBit-check
varies for each check. Therefore, an average value for
TBit-check is given in the electrical characteristics.
TBit-check depends on the selected baud-rate range and on
TClk. A higher baud-rate range causes a lower value for
TBit-check resulting in a lower current consumption in pol-
ling mode.
In the presence of a valid transmitter signal, TBit-check is
dependent on the frequency of that signal, fSig, and the
count of the checked bits, NBit-check. A higher value for
NBit-check thereby results in a longer period for TBit-check
requiring a higher value for the transmitter pre-burst
TPreburst.
Receiving Mode
If the bit check was successful for all bits specified by
NBit-check, the receiver switches to receiving mode. Ac-
cording to figure 9, the internal data signal is switched to
Pin DATA in that case and the data clock is available after
the start bit has been detected (figure 20). A connected µC
can be woken up by the negative edge at Pin DATA or by
the data clock at Pin DATA_CLK. The receiver stays in
that condition until it is switched back to polling mode ex-
plicitly.
10 (32)
Preliminary Information
Rev. A2, 19-Oct-00

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