STR-A6100 Ver la hoja de datos (PDF) - Sanken Electric co.,ltd.
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STR-A6100 Datasheet PDF : 26 Pages
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STR-A6100 Series
10.Design Notes
VCC pin voltage
Without R2
10.1 External Components
Take care to use properly rated, including derating as
necessary and proper type of components.
BR1
VAC
C1
CRD clamp snubber
T1
C6
R1
RST
DST
D1
P
87
5
D D NC ST
C5
U1
STRA6100
D2 R2
C2
D
C（RC）
damper snubber
S/OCP VCC GND FB/OLP
1234
ROCP
DZ1
C3 PC1
C4
Figure 10-1 The IC peripheral circuit
Electrolytic Capacitor
Apply proper derating to ripple current, voltage, and
temperature rise. Use of high ripple current and low
impedance types, designed for switch mode power
supplies, is recommended.
S/OCP Pin Peripheral Circuit
Choose a type of low internal inductance because a
high frequency switching current flows to ROCP in
Figure 10-1, and of properly allowable dissipation.
VCC Pin Peripheral Circuit
The value of C2 in Figure 10-1 is generally
recommended to be 10µ to 47μF (refer to Section 9.1,
because the startup time is determined by the value of
C2). In actual power supply circuits, there are cases in
which the VCC pin voltage fluctuates in proportion to
the output current, IOUT (see Figure 10-2), and the
Overvoltage Protection function (OVP) on the VCC
pin may be activated. This happens because C2 is
charged to a peak voltage on the auxiliary winding D,
which is caused by the transient surge voltage coupled
from the primary winding when the power MOSFET
turns off. For alleviating C2 peak charging, it is
effective to add some value R2, of several tenths of
ohms to several ohms, in series with D2 (see Figure
10-1). The optimal value of R2 should be determined
using a transformer matching what will be used in the
actual application, because the variation of the
auxiliary winding voltage is affected by the
transformer structural design.
With R2
Output current, IOUT
Figure 10-2 Variation of VCC pin voltage and power
FB/OLP Pin Peripheral Circuit
Figure 10-1 performs high frequency noise rejection
and phase compensation, and should be connected
close to these pins. The value of C3 is recommended
to be about 2200p to 0.01µF.
In order to make the value of C3 low and make the
output response fast, DZ1 and C4 are connected.
DZ1 prevents C4 charging in normal operation. The
zener voltage of DZ1, VZ should be set higher than
FB/OLP pin voltage in normal operation. Usually, the
value of VZ is about 4.7 V to 5.6 V.
C4 is for OLP delay time, tDLY setting. If C4 is too
small, the power supply may not start due to OLP
operation (see Section 9.8). The value of C4 is about
4.7 μF to 22 μF.
C3, C4 and DZ1 should be selected based on actual
operation in the application.
ST Pin Peripheral Circuit
When STR-A61×× and STR-A61××M are used, DST
or RST should be connected to ST pin as shown in
Figure 10-1. DST and RST prevent negative voltage
from applying to ST pin. If ST pin voltage becomes
under −0.3 V, the power supply may not start. The
value of DST and RST should be selected based on
actual operation in the application.
Recommended value of RST is 33 kΩ,
Recommended characteristics of DST is as follows:
Characteristics
Peak Reverse Voltage, VRM
Forward current, IF
Reverse Recovery Time, trr
Reverse Leakage Current, IR
Recommended range
> 35 V
> 1.5 mA
< 27 μs
< 100 μA
Snubber Circuit
In case the serge voltage of VDS is large, the circuit
should be added as follows (see Figure 10-1);
・ A clamp snubber circuit of a capacitor-resistor-
diode (CRD) combination should be added on the
primary winding P.
・ A damper snubber circuit of a capacitor (C) or a
resistor-capacitor (RC) combination should be
added between the D pin and the GND pin.
In case the damper snubber circuit is added, this
components should be connected near D pin and
S/OCP pin.
STR-A6100 - DS Rev.2.1
SANKEN ELECTRIC CO.,LTD.
18
Jun. 05, 2014
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