SSGSC34119 Ver la hoja de datos (PDF) - Secos Corporation.

Número de pieza

componentes Descripción

Fabricante

SSGSC34119

Low Power Audio Amplifier

Secos Corporation. 

Elektronische Bauelemente

SSGSC34119

Low Power Audio Amplifier

The outputs of both amplifiers are capable of sourcing and sinking a peak current of 200 mA. The outputs can

typically swing to within ≈0.4 V above ground, and to with ≈ 1.3 V below VCC, at the maximum current. See Figures 17

and 18 for VOH and VOL curves.

The output dc offset voltage (VO1-VO2) is primarily a function of the feedback resistor (Rf), and secondarily due to the

amplifiers' input offset voltages. The input offset voltage of the two amplifiers will generally be similar for a particular IC,

and therefore nearly cancel each other at the outputs. Amplifier #1's bias current, however, flows out of Vin (Pin 4) and

through Rf, forcing V01 to shift negative by an amount equal to [Rf x IIB]. VO2 is shifted positive an equal amount. The

output offset voltage, specified in the Electrical Characteristics, is measured with the feedback resistor shown in the

Typical Application Circuit, and therefore takes into account the bias current as well as internal offset voltages of the

amplifiers. The bias current is constant with respect to VCC.

FC1 and FC2

Power supply rejection is provided by the capacitors (C1 and C2 in the Typical Application Circuit) at FC1 and FC2.

C2 is somewhat dominant at low frequencies, while C1 is dominant at high frequencies, as shown in the graphs of

Figures 4 to 7. The required values of C1 and C2 depend on the conditions of each application. A line powered

speakerphone, for example, will require more filtering than a circuit powered by a well regulated power supply. The

amount of rejection is a function of the capacitors, and the equivalent impedance looking into FC1 and FC2 (listed in the

Electrical Characteristics as RFC1 and RFC2).

In addition to providing filtering, C1 and C2 also affect the turn-on time of the circuit at power-up, since the two

capacitors must charge up through the internal 50 kΩ and 125 kΩ resistors. The graph of Figure 1 indicates the turn-on

time upon application of VCC of + 6.0 V. The turn-on time is ≈ 60% longer for VCC = 3.0 V, and ≈ 20% less for VCC = 9.0V.

Turn-off time is < 10 us upon removal of VCC.

Chip Disable

The Chip Disable (Pin 1) can be used to power down the IC to conserve power, or for muting, or both. When at a

Logic "0" (0 V to 0.8 V), the SGSC34119 is enabled for normal operation. When Pin 1 is at a Logic "1" (2.0 V to VCC V),

the IC is disabled. If Pin 1 is open, that is equivalent to a Logic "0", although good design practice dictates that an input

should never be left open. Input impedance at Pin 1 is a nominal 90 kΩ. The power supply current (when disabled) is

shown in Figure 19.

Muting, defined as the change in differential gain from normal operation to muted operation, is in excess of 70 dB.

The turn-off time of the audio output, from the application of the CD signal, is <2.0 μs, and turn on-time is 12 ms-15 ms.

Both times are independent of C1,C2, and VCC.

When the SGSC34119 is disabled, the voltages at FC1 and FC2 do not change as they are powered from VCC. The

outputs, VO1 and VO2, change to a high impedance condition, removing the signal from the speaker. If signals from other

sources are to be applied to the outputs (while disabled), they must be within the range of VCC and Ground.

Power Dissipation

Figures 8 to 10 indicate the device dissipation (within the IC) for various combinations of VCC, RL, and load power.

The maximum power which can safely be dissipated within the SGSC34119 is found from the following equation: PD =

(140°C-TA)/θJA where TA is the ambient temperature; and θJA is the package thermal resistance (100°C /W for the

standard DIP package.)

The power dissipated within the SGSC34119, in a given application, is found from the following equation:

PD = (VCC x ICC) + (IRMS x VCC) – (RL x IRMS2) where ICC is obtained from Figure 19; and IRMS is the RMS current at the

load; and RL is the load resistance.

Figures 8 to 10, along with Figures 11 to 13 (distortion curves), and a peak working load current of ±200 mA, define

the operating range for the SGSC34119. The operating range is further defined in terms of allowable load power in

Figure 14 for loads of 8.0Ω, 16Ω and 32Ω. The left (ascending) portion of each of the three curves is defined by the

power level at which 10% distortion occurs. The center flat portion of each curve is defined by the maximum output

current capability of the SGSC34119. The right (descending) portion of each curve is defined by the maximum internal

power dissipation of the IC at 25°C. At higher ambient temperatures, the maximum load power must be reduced

according to the above equations. Operating the device beyond the current and junction temperature limits will degrade

long term reliability.

Layout Considerations

Normally a snubber is not needed at the output of the SGSC34119, unlike many other audio amplifiers. However, the

PC board layout, stray capacitances, and the manner in which the speaker wires are configured, may dictate otherwise.

Generally, the speaker wires should be twisted tightly and not more than a few inches in length.

01-June-2002 Rev. A

Page 4 of 9

Share Link: