RF3320 Ver la hoja de datos (PDF) - RF Micro Devices
Número de pieza
componentes Descripción
Fabricante
RF3320 Datasheet PDF : 18 Pages
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RF3320
Preliminary
Pin Function Description
Interface Schematic
1
SHDNB Chip shutdown pin. Forcing a logic low causes all circuits to switch off
and gain settings to be lost.
2
TX EN
Signal path enable pin. Logic high turns on signal path. Logic low turns
off signal path, but leaves serial bus active.
3
NC
Not connected. This pin should be grounded.
4
VIN
Input pin. This should be externally AC-coupled to signal source.
See pin 5.
5
VINB
Complementary input pin. This should be externally coupled to signal
source. For single-ended use, this pin should be AC-coupled to ground.
3
VCC
550 Ω 550 Ω
500 Ω
VIN
500 Ω
VINB
6
VCC
This pin is connected to the supply voltage.
7
VCC
Same as pin 6.
8
RAMP
An external capacitor between this pin and ground controls turn-on
time.
9
SCLK
Serial bus clock input.
10
CS
Serial bus enable.
11
SDA
Serial bus data input.
12
VOUTB Open collector output. Connect to VCC via balun primary.
See pin 13.
13
VOUT
Open collector output. Connect to VCC via balun primary.
VOUT
VOUTB
300 Ω
RE
14
15
16
PKG
BASE
NC
NC
GND
GND
Same as pin 3.
Same as pin 3.
Connect to ground.
Die is mounted on a heat sink slug that should be connected to ground.
Device grounds are internally bonded to the slug.
Serial Bus Block Diagram
D6
D5
D4
D3
D2
D1
D0
CS
SDA
SCLK
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CK CLR
CK CLR
CK CLR
CK CLR
CK CLR
CK CLR
CK CLR
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CK CLR
CK CLR
CK CLR
CK CLR
CK CLR
CK CLR
CK CLR
POR
3-30
Rev A10 010514
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