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NVM3060

4096-Bit EEPROM

Unspecified 

NVM 3060

3. Functional Description

3.1. Memory Operation

The internal memory address space ranges from ad-

dress 0 to address 511. Addresses 516 and 526 provide

special functions.

To read a stored data word, the desired memory address

has to be entered to the memory address register first.

This is done by serially entering the IM bus address 128

(optionally 132) (during Ident = L), followed by the mem-

ory address (during Ident D = H) in a single IM bus op-

eration.

With the memory address register set, the memory data

may be read. This, in turn, is done by entering the IM bus

address 129 (optionally 133) to the device (during Ident

= L). Immediately after this, within the same IM bus op-

eration (during Ident = H) the open-drain Data output will

conduct to serially transmit the respective 8-bit memory

data within a 16-bit word.

Reprogramming a memory location is done in two steps,

a) and b), that are identical except for the data word to

be entered. Step a) resets all bits to ”1”, and step b) pro-

grams the desired data into the selected memory loca-

tion.

a) First, the desired memory address is entered in the

way described above. Second, the actual programming

is initiated by serially entering the IM bus address 131

(optionally 135) followed by the data word to be stored,

which is 255 for step a). The device will now internally

time its programming sequence. During this ”busy”

time all inputs are blocked from affecting the program-

ming except for the Reset input. A Reset = L signal will

immediately cancel any programming operation as well

as any bus operation in progress.

The busy state may be interrogated by reading bit 1 of

address location 526. A High level of this “busy-bit” in-

dicates that programming is still under way. The IM bus

operation for entering address 526 should always di-

rectly precede reading the busy-bit.

Reading any other address location during the busy

state will produce erroneous data at the Data output. An

address change operation during the busy state will not

change the memory address register content. The in-

tended start of another programming operation during

the busy time will not be executed.

b) After time-out, normal operation may be resumed,

e.g. by performing the second step of a programming

sequence, i.e. by programming the desired 8-bit data

word into the respective memory address location. This

is done by restoring the proper memory address first, if

necessary, and then by serially entering the IM bus ad-

dress 131 (optionally 135) followed by the desired 8-bit

data word as LSB in a 16-bit word. The device will again

time its own programming sequence as described under

a). After time-out the new data may be verified.

3.2. Testing

The NVM 3060 EEPROM contains circuitry designed to

facilitate testing of the various functions. By program-

ming data into address location 516, the device is

switched to one or more of a number of test modes. A

detailed description is given in section 4.

3.3. Protected Matrix

The programming matrix contains a protectable portion.

Addresses 0 to 15, 64 to 79, 128 to 143, 192 to 207, 256

to 271, 320 to 335, 384 to 399 and 448 to 463 can only

be programmed if the ”Safe” input S (pin 2) is at high

potential. In that way, this portion of the memory is pro-

tected against inadvertent reprogramming even if such

false informations were received via the IM bus. The

second part of the programming matrix is not protected.

3.4. Shipment

Parts are shipped with all bits set to “1”.

8

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