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NIS5101 Ver la hoja de datos (PDF) - ON Semiconductor

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Fabricante
NIS5101
ON-Semiconductor
ON Semiconductor ON-Semiconductor
NIS5101 Datasheet PDF : 12 Pages
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NIS5101
The theoretical equation for the UVLO turnon voltage is:
RUVLO
(kW)
+
215 Vin * 2970
46.8 * Vin
Where Vin is the desired turnon voltage, and RUVLO is
the programming resistance from the UVLO pin to the
Input + pin.
The UVLO trip point voltage calculated through the
theoretical formula may show small variations with respect
to Figure 3, therefore it is recommended to use the formulas
gotten from the UVLO characterization, which are shown
below:
RUVLO (kW) = e [(y+4.4706) / 6.4484]; for TJ = 25°C
RUVLO (kW) = e [(y+4.6185) / 6.8525]; for TJ = 120°C
RUVLO (kW) = e [(y+5.7642) / 6.7234]; for TJ = 40°C
where “y” is the desired UVLO value.
Drain
Vreg
Input +
280 k
OVLO
400 k
11 V
40 k
Input
400 k
Figure 18. Overvoltage Lockout Circuit
To reduce nuisance tripping due to transients and noise
spikes, a capacitor may be added from the UVLO pin to the
Input – pin. This will create a low pass filter with a cutoff
frequency of f. The required capacitance on this pin is:
ƪ ǒ Ǔƫ C +
1
2p · f
150 k )
RUVLO · 200 k
RUVLO)200 k
Overvoltage Lockout: The overvoltage shutdown circuit
is an optional protection feature that can be disabled by
simply grounding the OVLO pin.
This circuit contains an internal Zener diode/resistor
combination in series with the gate of a FET. When the
input + to input voltage reaches a level sufficient to apply
the required gate voltage to the FET, operation of the
device will be inhibited. There is a hysteresis circuit built
in that will eliminate on/off bursts due to noise on the input.
The equivalent circuit is shown in Figure 18.
The equation for the OVLO trip point is:
ROVLO
(kW)
+
290 Vin
113.7
*
*
3200
Vin
Where ROVLO is the overvoltage programming resistor
from the OVLO pin to Input +, and Vin is the desired trip
point for the overvoltage shutdown to occur.
The OVLO trip point voltage calculated through the
theoretical formula may show small variations with respect
to Figures 4, 5 and 6, therefore it is recommended to use the
formulas gotten from the OVLO characterization, which
are shown below:
ROVLO (kW) = e [(y+69.6) / 24.82]; for TJ = 25°C
ROVLO (kW) = e [(y+60.56) / 23.27]; for TJ = 120°C
ROVLO (kW) = e [(y+66.47) / 23.52]; for TJ = 40°C
where “y” is the desired OVLO value.
Similar to the undervoltage lockout circuit, the noise
sensitivity of this circuit can be reduced by adding a
capacitor from the OVLO pin to Input . The capacitor
required for the desired pole frequency is:
COVLO
+
(1
)
31.3 · 106 · ROVLO)
2pf · ROVLO
Temperature Limit: The temperature limit circuit senses
the temperature of the Power FET and removes the gate
drive if the maximum level is exceeded. There is a nominal
hysteresis of 40°C for this circuit. After a thermal
shutdown, the device will automatically restart when the
temperature drops to a safe level as determined by the
hysteresis.
Current Limit: The device uses a SENSEFET to measure
the Drain Current. The behavior of the SENSEFET in a
short circuit condition varies from that in an overload
because there is sufficient voltage across the drain to source
terminals for the sense current to follow the ratio of the
sense cells to main FET cells. This is not the case when the
device is fully enhanced, since there are only a few
millivolts from drain to source. In this condition, the sense
voltage follows a different set of equations.
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