NIS3001 Ver la hoja de datos (PDF) - ON Semiconductor
Número de pieza
componentes Descripción
Fabricante
NIS3001 Datasheet PDF : 18 Pages
| |||
NIS3001
BST
(17)
TG
VIN
(15, 16)
(12, 13)
(4)
VS
+
−
+
−
4.35 V
(3)
EN
(1)
CO
(2, 19)
GND
Thermal
Shutdown
Level
Shifter
Delay
Non−Overlap
Control
Delay
4.0 V
VS
DRN
(7−11, 14, 18)
Figure 2. Block Diagram
BG
(20, 21)
PGND
(5, 6)
PIN FUNCTION DESCRIPTIONS
Pad #
Symbol
Description
1
CO
Logic level control input produces complementary output states.
2, 19
GND
Signal ground.
3
EN
Logic level enable input forces internal driver top gate and bottom gate low, and supply current to less
than 10 mA when EN is low.
4
VS
Power supplied to the internal driver. A 1.0 mF ceramic capacitor should be connected from this pin to
PGND.
5, 6
PGND
Power ground. High current return path for the lower internal.
7−11,
14, 18
DRN
Switching Node, connected to output inductor (10).
Switching Node, connected to the boost capacitor (14).
All pins connected internally.
12, 13
VIN
DC−DC converter input voltage.
15, 16
TG
High Side Driver Output (Top Gate, this pin is used to monitor the gate).
17
BST
Bootstrap supply voltage input. In conjunction with a Schottky diode to Vs, a 0.1 mF to 1.0 mF ceramic
capacitor connected between BST and DRN (14).
20, 21
BG
Low Side Driver Output (Bottom Gate, this pin is used to monitor the gate).
http://onsemi.com
2
Share Link: 