MU9C2480A(1998) Ver la hoja de datos (PDF) - Music Semiconductors
Número de pieza
componentes Descripción
Fabricante
MU9C2480A Datasheet PDF : 28 Pages
| |||
INSTRUCTION SET SUMMARY
MU9C2480A/L
Instruction: Select Persistent Destination Cont.
Operation
Mnemonic Op-Code
Mem. at Highest-Prio. Match, Emp. SPD M@HM,E
012DH
Masked by MR1
SPD M@HM[MR1],E 016DH
Masked by MR2
SPD M@HM[MR2],E 01ADH
Mem. at Highest-Prio. Match, Skip SPD M@HM,S 012EH
Masked by MR1
SPD M@HM[MR1],S 016EH
Masked by MR2
SPD M@HM[MR2],S 01AEH
Instruction: Data Move Continued
Operation
Mnemonic
Mask Register 1 from:
Comparand Register
MOV MR1,CR
No Operation
NOP 0309H
Mask Register 2
MOV MR1,MR2
Memory at Address Reg. MOV MR1,[AR]
Memory at Address
MOV MR1,aaaH
Mem. at Highest-Prio. Match MOV MR1,HM
Op-Code
0308H
030AH
030CH
0B0CH
030DH
Mem. at High.-Prio. Match, Random SPD M@HM,R
012FH
Masked by MR1
SPD M@HM[MR1],R 016FH
Masked by MR2
SPD M@HM[MR2],R 01AFH
Mem. at Next Free Addr., Valid SPD M@NF,V
0134H
Masked by MR1
SPD M@NF[MR1],V 0174H
Masked by MR2
SPD M@NF[MR2],V 01B4H
Mask Register 2 from:
Comparand Register
MOV MR2,CR
Mask Register 1
MOV MR2,MR1
No Operation
NOP
Memory at Address Reg. MOV MR2,[AR]
Memory at Address
MOV MR2,aaaH
Mem. at Highest-Prio. Match MOV MR2,HM
0310H
0311H
0312H
0314H
0B14H
0315H
Mem. at Next Free Addr., Empty SPD M@NF,E
Masked by MR1
SPD M@NF[MR1],E
Masked by MR2
SPD M@NF[MR2],E
0135H
0175H
01B5H
Mem. at Next Free Addr., Skip SPD M@NF,S
0136H
Masked by MR1
SPD M@NF[MR1],S 0176H
Masked by MR2
SPD M@NF[MR2],S 01B6H
Mem. at Next Free Addr., Random SPD M@NF,R
0137H
Masked by MR1
SPD M@NF[MR1],R 0177H
Masked by MR2
SPD M@NF[MR2],R 01B7H
Instruction: Temporary Command Override
Operation
Mnemonic Op-Code
Control Register
TCO CT
0200H
Page Address Register
TCO PA
0208H
Segment Control Register
TCO SC
0210H
Read Next Free Address
TCO NF
0218H
Address Register
TCO AR
0220H
Device Select Register
TCO DS
0228H
Read Persistent Source
TCO PS
0230H
Read Persistent Destination TCO PD
0238H
Instruction: Data Move
Operation
Comparand Register from:
No Operation
Mask Register 1
Mask Register 2
Memory at Address Reg.
Masked by MR1
Masked by MR2
Mnemonic Op-Code
NOP
MOV CR,MR1
MOV CR,MR2
MOV CR,[AR]
MOV CR,[AR][MR1]
MOV CR,[AR][MR2]
0300H
0301H
0302H
0304H
0344H
0384H
Memory at Address
Masked by MR1
Masked by MR2
MOV CR,aaaH
0B04H
MOV CR,aaaH[MR1] 0B44H
MOV CR,aaaH[MR2] 0B84H
Mem. at Highest-Prio. Match MOV CR,HM
Masked by MR1
MOV CR,HM[MR1]
Masked by MR2
MOV CR,HM[MR2]
0305H
0345H
0385H
Memory at Address Register, No Change to Validity bits, from:
Comparand Register
MOV [AR],CR
0320H
Masked by MR1
MOV [AR],CR[MR1] 0360H
Masked byMR2
MOV [AR],CR[MR2] 03A0H
Mask Register 1
MOV [AR],MR1
0321H
Mask Register 2
MOV [AR],MR2
0322H
Memory at Address Register, Location set Valid, from:
Comparand Register
MOV [AR],CR,V
0324H
Masked by MR1
MOV [AR],CR[MR1],V 0364H
Masked byMR2
MOV [AR],CR[MR2],V 03A4H
Mask Register 1
MOV [AR],MR1,V 0325H
Mask Register 2
MOV [AR],MR2,V 0326H
Memory at Address, No Change to Validity bits, from:
Comparand Register
MOV aaaH,CR
0B20H
Masked byMR1
MOV aaaH,CR[MR1] 0B60H
Masked byMR2
MOV aaaH,CR[MR2] 0BA0H
Mask Register 1
MOV aaaH,MR1
0B21H
Mask Register 2
MOV aaaH,MR2
0B22H
Memory at Address, Location set Valid, from:
Comparand Register
MOV aaaH,CR,V 0B24H
Masked byMR1
MOV aaaH,CR[MR1],V 0B64H
Masked byMR2
MOV aaaH,CR[MR2],V 0BA4H
Mask Register 1
MOV aaaH,MR1,V 0B25H
Mask Register 2
MOV aaaH,MR2,V 0B26H
Memory at Highest-Priority Match, No Change to Validity
bits, from:
Comparand Register
MOV HM,CR
0328H
Masked byMR1
MOV HM,CR[MR1] 0368H
Masked byMR2
MOV HM,CR[MR2] 03A8H
Mask Register 1
MOV HM,MR1
0329H
Mask Register 2
MOV HM,MR2
032AH
Memory at Highest-Priority Match, Location set Valid, from:
Comparand Register
MOV HM,CR,V
032CH
Masked byMR1
MOV HM,CR[MR1],V 036CH
Masked byMR2
MOV HM,CR[MR2],V 03ACH
Mask Register 1
MOV HM,MR1,V
032DH
Mask Register 2
MOV HM,MR2,V
032EH
19
Rev. 1a
Share Link: 