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MJE4343

High-Voltage - High Power Transistors

ON Semiconductor 

MJE4343 (NPN), MJE4353 (PNP)

100

50

20

5.0 ms

10

5.0

dc

2.0

1.0

0.5

0.2

0.1

3.0

SECONDARY BREAKDOWN LIMITED

THERMAL LIMIT TC = 25°C

BONDING WIRE LIMITED

5.0 7.0 10

20 30 50 70 100 150 200

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

Figure 10. Maximum Forward Bias Safe

Operating Area

REVERSE BIAS

For inductive loads, high voltage and high current must be

sustained simultaneously during turn−off, in most cases,

with the base to emitter junction reverse biased. Under these

conditions the collector voltage must be held to a safe level

at or below a specific value of collector current. This can be

accomplished by several means such as active clamping, RC

snubbing, load line shaping, etc. The safe level for these

devices is specified as Reverse Bias Safe Operating Area

and represents the voltage−current conditions during

reverse biased turn−off. This rating is verified under

clamped conditions so that the device is never subjected to

an avalanche mode. Figure 11 gives RBSOA characteristics.

There are two limitations on the power handling ability of

a transistor: average junction temperature and second

breakdown. Safe operating area curves indicate IC − VCE

limits of the transistor that must be observed for reliable

operation; i.e., the transistor must not be subjected to greater

dissipation than the curves indicate.

The data of Figure 10 is based on TC = 25°C; TJ(pk) is

variable depending on power level. Second breakdown

pulse limits are valid for duty cycles to 10% but must be

derated when TC ≥ 25°C. Second breakdown limitations do

not derate the same as thermal limitations. Allowable

current at the voltages shown on Figure 10 may be found at

any case temperature by using the appropriate curve on

Figure 9.

20

16

TJ = 100°C

VBE(off) ≤ 5 V

12

8.0

4.0

20 40 60 80 100 120 140 160 180

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

Figure 11. Maximum Reverse Bias Safe

Operating Area

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