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MC1141A

Advanced Microstepping Motion Control Chipset

PMD 

Pin Descriptions

The following tables provide pin descriptions for the MC1241A-series chipsets.

IC

Pin Name

Pin #

I/O Chip Pinouts

I/O

QuadA1

28

QuadB1

42

QuadA2

26

QuadB2

30

Description/Functionality

Quadrature A, B channels for axis 1 - 2 (input). Each of these 2 pairs of quadrature (A, B)

signals provide the position feedback for an incremental encoder. When the encoder is

moving in the positive, or forward direction, the A signal leads the B signal by 90 degs.

NOTE: Many encoders require a pull-up resistor on each of these signals to establish a

proper high signal (check the encoder electrical specifications)

NOTE: For MC1241A all 4 pins are valid. For MC1141A pins for axes 1 only are valid. Invalid

axis pins can be left unconnected

I/O

~Index1

24

~Index2

9

NOTE: These signals are not required for normal operation, but may be used if desired to

confirm motor position.

Index encoder signals for axis 1-2 (input). Each of these 2 signals indicate the index flag

state from the encoder. A valid index pulse is recognized by the chip set when the index flag

transitions low, followed by the corresponding A and B channels of the encoder transitioning

low. The index pulse is recognized at the later of the A or B transitions. If not used this signal

must be tied high.

NOTE: For MC1241A both pins are valid. For MC1141A pins for axes 1 only are valid.

Invalid axis pins can be left unconnected.

I/O

~Home1

13

~Home2

23

NOTE: These signals are not required for normal operation, but may be used if desired to

confirm motor position.

Home signals for axis 1-2 (input). Each of these signals provide a general purpose input to

the hardware position capture mechanism. A valid home signal is recognized by the chipset

when the home flag transitions low. These signals have a similar function as the ~Index

signals, but are not gated by the A and B encoder channels. For valid axis pins, If not used,

this signal must be tied high. See below for valid pin definitions for the MC1241A and

MC1141A.

NOTE: For MC1241A both pins are valid. For MC1141A pins for axes 1 only are valid.

Invalid axis pins can be left unconnected.

I/O

DACSlct

33

I/O

CPClk

46

I/O

I/OClkIn

52

I/O

I/OClkOut

45

I/O

CPAddr0

68

CPAddr1

27

CPAddr2

29

CPAddr3

12

NOTE: These signals are not required for normal operation, but may be used if desired to

confirm motor position.

DAC Select (output). This signal is asserted high to select any of the available DAC output

channels. For details on DAC decoding see description of DAC16Addr0-1 signals.

I/O chip clock (input). This signal is connected directly to the ClkOut pin (CP chip) and

provides the clock signal for the I/O chip. The frequency of this signal is 1/4 the user-provided

ClkIn (CP chip) frequency.

Phase shifted clock (input). This signal must be connected to I/OClkOut (I/O chip), and inputs

a phase shifted clock signal.

Phase shifted clock (output). This signal must be connected to I/OClkIn (I/O chip), and

outputs a phase shifted clock signal.

I/O chip to CP chip communication address (input). These 4 signals are connected to the

corresponding I/OAddr0-3 pins (CP chip), and together provide addressing signals to

facilitate CP to I/O chip communication.

13

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