M5M44260CJ-5 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC
Número de pieza
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Fabricante
M5M44260CJ-5 Datasheet PDF : 29 Pages
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MITSUBISHI LSIs
M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S
FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
CAPACITANCE (Ta=0~70˚C , VCC=5V±10%, VSS=0V, unless otherwise noted)
Symbol
CI (A)
CI (CLK)
CI / O
Parameter
Input capacitance, address inputs
Input capacitance, clock inputs
Input/Output capacitance, data ports
Test conditions
VI=VSS
f=1MHz
VI=25mVrms
Limits
Min Typ Max
Unit
5
pF
7
pF
7
pF
SWITCHING CHARACTERISTICS (Ta=0~70˚C, VCC=5V±10%, Vss=0V, unless otherwise noted, see notes 6,13,14)
Symbol
Parameter
tCAC
Access time from CAS
tRAC
Access time from RAS
tAA
Columu address access time
tCPA
Access time from CAS precharge
tOEA
Access time from OE
tCLZ
Output low impedance time from CAS low
tOFF
Output disable time after CAS high
tOEZ
Output disable time after OE high
Limits
M5M44260C-5,-5S M5M44260C-6,-6S M5M44260C-7,-7S Unit
Min Max Min Max Min Max
(Note 7,8)
13
15
20
ns
(Note 7,9)
50
60
70
ns
(Note 7,10)
25
30
35
ns
(Note 7,11)
30
35
40
ns
(Note 7)
13
15
20
ns
(Note 7) 5
5
5
ns
(Note 12)
13
15
20
ns
(Note 12)
13
15
20
ns
Note 6: An initial pause of 500 µs is required after power-up followed by a minimum of eight initialization cycles (RAS-only refresh or CAS before RAS refresh
cycles).
Note the RAS may be cycled during the initial pause. And 8 initialization cycles are required after prolonged periods (greater than 8.2ms) of RAS
inactivity before proper device operation is achieved.
7: Measured with a load circuit equivalent to 2TTL loads and 100pF.
8: Assumes that tRCD ≥ tRCD(max) and tASC ≥ tASC(max).
9: Assumes that tRCD ≤ tRCD(max) and tRAD ≤ tRAD(max). If tRCD or tRAD is greater than the maximum recommended value shown in this table, tRAC
will increase by amount that tRCD exceeds the value shown.
10: Assumes that tRAD ≥ tRAD(max) and tASC ≤ tASC(max).
11: Assumes that tCP ≤ tCP(max) and tASC ≥ tASC(max).
12: tOFF(max) and tOEZ (max) defines the time at which the output achieves the high impedance state (IOUT ≤ ±10 µA ) and is not reference to VOH(min)
or VOL(max).
4 M5M44260CJ,TP-5,-5S : Under development
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