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M37920S4CGP Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

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M37920S4CGP
Mitsubishi
MITSUBISHI ELECTRIC  Mitsubishi
M37920S4CGP Datasheet PDF : 39 Pages
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MITSUBISHI MICROCOMPUTERS
M37920S4CGP
16-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION (Microcomputer mode)
Input/
Pin
Name
Output
Functions
Vcc, Vss Power supply input
— Apply 5 V±10 % to Vcc, and 0 V to Vss.
MD0
MD0
Input This pin controls the processor mode. Connect this pin to VCC.
MD1
MD1
Input Connect this pin to Vss.
RESET
Reset input
Input The microcomputer is reset when “L” level is applies to this pin.
XIN
XOUT
Clock input
Clock output
Input
Output
These are input and output pins of the internal clock generating circuit. Connect a
ceramic or quartz- crystal resonator between the XIN and XOUT pins. When an
external clock is used, the clock source should be connected to the XIN pin, and the
XOUT pin should be left open.
BYTE
External data bus width
select input
Input
This pin determines whether the external data bus has an 8-bit width or 16-bit width
for the memory expansion mode or microprocessor mode. The width is 16 bits when
“L” signal is input, and 8 bits when “H” signal is input.
AVcc,
AVss
Analog power supply input
— Power supply input pin for the A-D converter. Connect AVcc to Vcc, and AVss to Vss
externally.
VREF
Reference voltage input
Input This is the reference voltage input pin for the A-D converter.
A0–A7
Low-order address
Output The low-order 8 bits of address (A0–A7) are output.
A8–A15/
Middle-order address/
MA0–MA7 DRAM address
Output The middle-order 8 bits of address (A8–A15) are input/output. While DRAM space is
accessed, multiplexed address (MA0–MA7) is output.
A16–A23/ High-order address/
MA8–MA11 DRAM address
Output The high-order 8 bits of address (A16–A23) are output. While DRAM space is ac-
cessed, multiplexed address (MA8–MA11) is output.
D0–D7
Low-order data
I/O The low-order 8 bits of data (D0–D7) are input/output.
P20/D8
P27/D15
I/O port P2/
High-order data
I/O s When 8-bit external data bus is used (BYTE = “H” level)
Port P2 is an 8-bit I/O port.
s When 16-bit external data bus is used (BYTE = “L” level)
The high-order 8 bits (D8–D15) are input/output.
P30/RDY,
RD,
BLW,
P33/BHW
Memory control signal I/O
Input
Output
Output
Output
While the input level at pin RDY is “L”, the microcomputer is placed in the ready
state. While pin RD is at “L” level, the microcomputer reads out data and instruc-
tion codes. Also, pin RDY can function as a programmable I/O port pin (P30) by
software.
s When 8-bit external data bus is used (BYTE = “H” level)
While pin BLW is at “L” level, the microcomputer writes data.
s When 16-bit external data bus is used (BYTE = “L” level)
While pin BLW is at “L” level, the microcomputer writes data into an even-
numbered address.
While pin BHW is at “L” level, the microcomputer writes data into an odd-
numbered address.
P40/ALE,
P41/φ1,
P42/TC,
P43/HOLD,
P44/HLDA
I/O port P4
Output
Output
I/O
Input
Output
Signal ALE is used to latch an address. φ1 has the same period as internal clock φ.
Pin P42 functions as a programmable I/O port pin.
While the input level at pin HOLD is at “L” level, the microcomputer is placed in the
hold state. Signal HLDA is used to inform the external that the microcomputer
enters the hold state. By software, pin ALE, clock φ1 output pin, and pins HOLD,
HLDA function as programmable I/O port pins (P40, P41, P43, P44). Pin P42 also
functions as pin TC.
P50–P57 I/O port P5
I/O Port P5 is an 8-bit I/O port. These pins also function as I/O pins for timers A0, A2,
and pulse output pins for the real-time output.
P60–P66 I/O port P6
I/O Port P6 is a 7-bit I/O port. These pins also function as I/O pins for timers A1, A3,
A4, input pins for DMA requests, and output pins for DMA acknowledge signals.
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