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M37905M8C-XXXFP

16 BIT CMOS MICROCOMPUTER

Mitsumi 

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MITSUBISHI MICROCOMPUTERS

M37905M4C-XXXFP, M37905M4C-XXXSP

M37905M6C-XXXFP, M37905M6C-XXXSP

M37905M8C-XXXFP, M37905M8C-XXXSP

16-BIT CMOS MICROCOMPUTER

BASIC FUNCTION BLOCKS

These microcomputers contain the following devices in the single

chip: ROM, RAM, CPU, bus interface unit, and peripheral devices

such as the interrupt control circuit, timers, serial I/O,

A-D converter, D-A converter, I/O ports, clock generating circuit, etc.

MEMORY

Figures 1 (1) through (3) show the memory maps. The address

space is 64 Kbytes from addresses 016 through FFFF16. This ad-

dress space is called “bank 016”.

The internal ROM and RAM are allocated as shown in Figures 1 (1)

through (3).

Addresses FFB416 through FFFF16 contain the RESET and the in-

terrupt vector addresses, and the interrupt vectors are stored there.

For details, refer to the section on interrupts.

Allocated to addresses 016 through FF16 are peripheral devices such

as I/O ports, A-D converter, D-A converter, serial I/O, timers, interrupt

control registers, etc. Figures 2 and 3 show the location of SFRs.

00000016

Bank 016

00FFFF16

00000016

0000FF16

00010016

000BFF16

000C0016

Peripheral devices'

control registers

Unused area

Internal RAM

1024 bytes

000FFF16

00100016

007FFF16

00800016

Unused area

Internal ROM

32 Kbytes

00FFB416

00FFFF16

Fig. 1 (1) Memory map of M37905M4C-XXXFP/SP (Single-chip mode)

00000016

Peripheral devices'

control registers

(See Figures 2 and 3.)

0000FF16

Interrupt vector table

00FFB416 UART2 transmit

UART2 receive

Timer A9

Timer A8

Timer A7

Timer A6

Timer A5

INT7

INT6

INT5

Reserved area

Address matching detect

Reserved area

Reserved area

INT4

INT3

A-D conversion

UART1 transmit

UART1 receive

UART0 transmit

UART0 receive

Timer B2

Timer B1

Timer B0

Timer A4

Timer A3

Timer A2

Timer A1

Timer A0

INT2

INT1

INT0

Received area

Watchdog timer

DBC

BRK instruction

00FFFE16

Zero divide

RESET

6

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