LTC1569CS8-6 Ver la hoja de datos (PDF) - Linear Technology
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LTC1569CS8-6 Datasheet PDF : 12 Pages
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LTC1569-6
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply
VS = 3V (V + = 3V, V – = 0V), fCLK = 4.096MHz,
over the full operating temperature range, otherwise specifications
fCUTOFF = 64kHz, RLOAD = 10k unless otherwise specified.
are
at
TA
=
25°C.
PARAMETER
Output DC Offset
(Note 2)
CONDITIONS
REXT = 10k, Pin 5 Shorted to Pin 7
Output DC Offset
Drift
REXT = 10k, Pin 5 Shorted to Pin 7
Clock Pin Logic Thresholds
when Clocked Externally
VS = 3V
VS = 5V
VS = ±5V
Power Supply Current
(Note 3)
fCLK = 256kHz (40k from Pin 6 to Pin 7,
Pin 5 Open, ÷ 4), fCUTOFF = 4kHz
fCLK = 4.096MHz (10k from Pin 6 to Pin 7,
Pin 5 Shorted to Pin 4, ÷ 1), fCUTOFF = 64kHz
Clock Feedthrough
Wideband Noise
THD
Clock-to-Cutoff
Frequency Ratio
Max Clock Frequency
(Note 4)
Min Clock Frequency
(Note 5)
Input Frequency Range
Pin 5 Open
Noise BW = DC to 2 • fCUTOFF
fIN = 3kHz, 1.5VP-P, fCUTOFF = 32kHz
VS = 3V
VS = 5V
VS = ±5V
VS = 3V, 5V, TA < 85°C
VS = ±5V
Aliased Components <–65dB
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: DC offset is measured with respect to Pin 3.
Note 3: If the internal oscillator is used as the clock source and the divide-
by-4 or divide-by-16 mode is enabled, the supply current is reduced as
much as 40% relative to the divide-by-1 mode.
MIN TYP MAX UNITS
VS = 3V
VS = 5V
VS = ±5V
VS = 3V
VS = 5V
VS = ±5V
Min Logical “1”
Max Logical “0”
±2
±5
mV
±6
±12
mV
±15
mV
25
µV/°C
25
µV/°C
75
µV/°C
2.7
V
0.5
V
Min Logical “1”
Max Logical “0”
4.0
V
0.5
V
Min Logical “1”
Max Logical “0”
4.0
V
0.5
V
VS = 3V
q
3
4
mA
5
mA
VS = 5V
q
3.5
5
mA
6
mA
VS = 10V
q
4.5
7
mA
8
mA
VS = 3V
q
VS = 5V
q
8
mA
11
mA
9
mA
13
mA
VS = 10V
q
12
mA
17
mA
0.1
mVRMS
95
µVRMS
80
dB
64
5
MHz
5
MHz
7
MHz
1.5
kHz
3
kHz
0.9 • fCLK
Hz
Note 4: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5: The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6: For more details refer to the Input and Output Voltage Range
paragraph in the Applications Information section.
3
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