LTC1502IS8-3.3 Ver la hoja de datos (PDF) - Linear Technology

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LTC1502IS8-3.3

Single Cell to 3.3V Regulated Charge Pump DC/DC Converter

Linear Technology 

LTC1502-3.3

APPLICATIONS INFORMATION

100Ω

ON OFF VCTRL

1

C2

2 C1+

8

VOUT

C3+ 7

3

LTC1502-3.3

C1–/SHDN C3 –

6

4

GND

5

VIN

10µF

1502-3.3 F01

Figure 1. Pull-Down Circuitry for Shutdown

will force a logic high on the C1–/SHDN pin and put the part

back into active mode. If no external pull-down is present

during the Hi-Z interval, the internal pull-up current will

maintain a logic high on the C1–/SHDN pin thereby keep-

ing the part in active mode.

The shutdown feature can be used to prevent charge pump

switching during noise sensitive intervals. Since the charge

pump oscillator is disabled during shutdown, output switch-

ing noise can be eliminated while the external pull-down is

active. The LTC1502-3.3 takes between 20µs and 50µs to

switch from shutdown to active mode once the pull-down

device has been turned off (assuming a 100pF external

capacitance to GND on the C1–/SHDN pin). A 100k pull-up

resistor from VIN to C1–/SHDN will speed up this transition

by a factor of five at the expense of 10µA or so of additional

shutdown current. To maintain regulation, a sufficiently

large output capacitor must be used to prevent excessive

VOUT droop while the charge pump is in shutdown. Also,

there must be adequate time for the charge pump to

recharge the output capacitor while the part is active. In

other words, the average load current must be low enough

for the LTC1502-3.3 to maintain a 3.3V output while the

part is active.

Capacitor Selection

For best performance, it is recommended that low ESR

capacitors be used for CIN, C2 and COUT to reduce noise

and ripple. The CIN, C2 and COUT capacitors should be

either ceramic or tantalum and should be 10µF or greater.

If the input source impedance is very low (< 0.5Ω), CIN

may not be needed. Ceramic capacitors are recommended

for the flying capacitors C1 and C3 with values of 0.47µF

to 2.2µF. Smaller values may be used in low output current

applications (e.g., IOUT < 1mA).

Output Ripple

Normal LTC1502-3.3 operation produces voltage ripple

on the VOUT pin. Output voltage ripple is required for

regulation. Low frequency ripple exists due to the hyster-

esis in the sense comparator and propagation

delays in the charge pump enable/disable circuits. High

frequency ripple is also present mainly from the ESR

(equivalent series resistance) in the output capacitor. Typi-

cal output ripple (VIN = 1.25V) under maximum load is

50mV peak-to-peak with a low ESR 10µF output capacitor.

The magnitude of the ripple voltage depends on several

factors. High input voltages increase the output ripple

since more charge is delivered to COUT per charging cycle.

Large output current load and/or a small output capacitor

(<10µF) results in higher ripple due to higher output

voltage dV/dt. High ESR capacitors (ESR > 0.5Ω) on the

output pin cause high frequency voltage spikes on VOUT

with every clock cycle.

There are several ways to reduce the output voltage ripple.

A larger COUT capacitor (22µF or greater) will reduce both

the low and high frequency ripple due to the lower COUT

charging and discharging dV/dt and the lower ESR typi-

cally found with higher value (larger case size) capacitors.

A low ESR ceramic output capacitor will minimize the high

frequency ripple, but will not reduce the low frequency

ripple unless a high capacitance value is chosen. A reason-

able compromise is to use a 10µF to 22µF tantalum

capacitor in parallel with a 1µF to 3.3µF ceramic capacitor

on VOUT to reduce both the low and high frequency ripple.

An RC filter may also be used to reduce high frequency

voltage spikes (see Figure 2).

8

VOUT +

LTC1502-3.3

10µF

TANTALUM

VOUT

1µF

CERAMIC

8

VOUT +

LTC1502-3.3

2Ω

10µF

+

10µF

VOUT

1502-3.3 F02

Figure 2. Output Ripple Reduction Techniques

6

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