LT1640HCS8 Ver la hoja de datos (PDF) - Linear Technology
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LT1640HCS8 Datasheet PDF : 16 Pages
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LT1640L/LT1640H
APPLICATIONS INFORMATION
Capacitor C1 and resistor R3 prevent Q1 from momen-
tarily turning on when the power pins first make contact.
Without C1 and R3, capacitor C2 would pull the gate of Q1
up to a voltage roughly equal to VEE • C2/CGS(Q1) before
the LT1640 could power up and actively pull the gate low.
By placing capacitor C1 in parallel with the gate capaci-
tance of Q1 and isolating them from C2 using resistor R3
the problem is solved. The value of C1 should be:
( )
VINMAX −
VTH
VTH
•
C2 + CGD
where VTH is the MOSFET’s minimum gate threshold and
VINMAX is the maximum operating input voltage.
R3’s value is not critical and is given by (VINMAX + ∆VGATE)/
5mA.
The waveforms are shown in Figure 6b. When the power
pins make contact, they bounce several times. While the
contacts are bouncing, the LT1640 senses an undervoltage
condition and the GATE is immediately pulled low when
the power pins are disconnected.
Once the power pins stop bouncing, the GATE pin starts to
ramp up. When Q1 turns on, the GATE voltage is held
constant by the feedback network of R3 and C2. When the
DRAIN voltage has finished ramping, the GATE pin then
ramps to its final value.
INRUSH
CURRENT
1A/DIV
GATE – VEE
10V/DIV
DRAIN
50V/DIV
VEE
50V/DIV
CONTACT
BOUNCE
5ms/DIV
1640 F06b
Figure 6b. Inrush Control Waveforms
1640lhfb
8
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