LP3983 Ver la hoja de datos (PDF) - Lowpower Semiconductor inc
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LP3983 Datasheet PDF : 8 Pages
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LP3983
Applications Information
Like any low-dropout regulator, the external
capacitors used with the LP3983 must be carefully
selected for regulator stability and performance.
Using a capacitor whose value is > 1µF on the
LP3983 input and the amount of capacitance can be
increased without limit. The input capacitor must be
located a distance of not more than
0.5 inch from the input pin of the IC and returned to a
clean analog ground. Any good quality ceramic or
tantalum can be used for this capacitor. The
capacitor with larger value and lower ESR
(equivalent series resistance) provides better PSRR
and line-transient response. The output capacitor
must meet both requirements for minimum amount
of capacitance and ESR in all LDOs application. The
LP3983 is designed specifically to work with low ESR
ceramic output capacitor in space-saving and
performance consideration. Using a ceramic
capacitor whose value is at least 1µF with ESR is >
25mΩ on the LP3983 output ensures stability. The
LP3983 still works well with output capacitor of other
types due to the wide stable ESR range. Figure 1
shows the curves of allowable ESR range as a
function of load current for various output capacitor
values. Output capacitor of larger capacitance can
reduce noise and improve load transient response,
stability, and PSRR. The output capacitor should be
located not more than 0.5 inch from the VOUT pin of
the LP3983 and returned to a clean analog ground.
Start-up Function
Enable Function
The LP3983 features an LDO regulator
enable/disable function. To assure the LDO regulator
will switch on, the EN turn on control level must be
greater than 1.2 volts. The LDO regulator will go into
the shutdown mode when the voltage on the EN pin
falls below 0.4 volts. For to protecting the system,
the LP3983 have a quick-discharge function. If the
enable function is not needed in a specific
application, it may be tied to VIN to keep the LDO
regulator in a continuously on state.
Bypass Capacitor and Low Noise
Connecting a 22nF between the BP pin and GND pin
significantly reduces noise on the regulator output, it
is critical that the capacitor connection between the
BP pin and GND pin be direct and PCB traces should
be as short as possible. There is a relationship
between the bypass capacitor value and the LDO
regulator turn on time. DC leakage on this pin can
affect the LDO regulator output noise and voltage
regulation performance.
Output Voltage Setting
Output voltage range of 1.25V to 6V.The output
voltage of the LP3983 adjustable regulator is
programmed using an external resistor divider as
shown in figure3.The output voltage is calculated
using:
LP3983-datasheet Oct.-2005
6-6
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