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HEF4013BP Datasheet PDF : 16 Pages
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NXP Semiconductors
HEF4013B
Dual D-type flip-flop
11. Dynamic characteristics
Table 7. Dynamic characteristics
Tamb = 25 C; unless otherwise specified. For test circuit see Figure 6.
Symbol Parameter
Conditions
VDD
Extrapolation formula Min
tPHL
HIGH to LOW
nCP to nQ, nQ;
5V
[1] 83 + 0.55 CL
-
propagation delay see Figure 4
10 V
34 + 0.23 CL
-
15 V
22 + 0.16 CL
-
nSD to nQ
5V
[1] 73 + 0.55 CL
-
10 V
29 + 0.23 CL
-
15 V
22 + 0.16 CL
-
nCD to nQ
5V
[1] 73 + 0.55 CL
-
10 V
29 + 0.23 CL
-
15 V
22 + 0.16 CL
-
tPLH
LOW to HIGH
nCP to nQ, nQ;
5V
[1] 68 + 0.55 CL
-
propagation delay see Figure 4
10 V
29 + 0.23 CL
-
15 V
22 + 0.16 CL
-
nSD to nQ
5V
[1] 48 + 0.55 CL
-
10 V
24 + 0.23 CL
-
15 V
17 + 0.16 CL
-
nCD to nQ
5V
[1] 33 + 0.55 CL
-
10 V
19 + 0.23 CL
-
15 V
12 + 0.16 CL
-
tt
transition time
see Figure 4
5V
[1] 10 + 1.00 CL
-
10 V
9 + 0.42 CL
-
15 V
6 + 0.28 CL
-
tsu
set-up time
nD to nCP;
5V
40
see Figure 4
10 V
25
15 V
15
th
hold time
nD to nCP;
5V
20
see Figure 4
10 V
20
15 V
15
tW
pulse width
nCP input LOW;
5V
60
see Figure 4
10 V
30
15 V
20
nSD input HIGH;
5V
50
see Figure 5
10 V
24
15 V
20
nCD input HIGH;
5V
50
see Figure 5
10 V
24
15 V
20
Typ Max Unit
110 220 ns
45 90 ns
30 60 ns
100 200 ns
40 80 ns
30 60 ns
100 200 ns
40 80 ns
30 60 ns
95 190 ns
40 80 ns
30 60 ns
75 150 ns
35 70 ns
25 50 ns
60 120 ns
30 60 ns
20 40 ns
60 120 ns
30 60 ns
20 40 ns
20 -
ns
10 -
ns
5-
ns
0-
ns
0-
ns
0-
ns
30 -
ns
15 -
ns
10 -
ns
25 -
ns
12 -
ns
10 -
ns
25 -
ns
12 -
ns
10 -
ns
HEF4013B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
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