HEF4013B(2015) Ver la hoja de datos (PDF) - NXP Semiconductors.
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HEF4013B Datasheet PDF : 16 Pages
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Nexperia
HEF4013B
Dual D-type flip-flop
11. Dynamic characteristics
Table 7. Dynamic characteristics
Tamb = 25 C; unless otherwise specified. For test circuit see Figure 6.
Symbol Parameter
Conditions
VDD
Extrapolation formula Min Typ Max Unit
tPHL
HIGH to LOW
nCP to nQ, nQ;
propagation delay see Figure 4
5V
10 V
[1] 83 + 0.55 CL
34 + 0.23 CL
- 110 220 ns
-
45 90 ns
15 V
22 + 0.16 CL
-
30 60 ns
nSD to nQ
5V
[1] 73 + 0.55 CL
- 100 200 ns
10 V
29 + 0.23 CL
-
40 80 ns
15 V
22 + 0.16 CL
-
30 60 ns
nCD to nQ
5V
[1] 73 + 0.55 CL
- 100 200 ns
10 V
29 + 0.23 CL
-
40 80 ns
15 V
22 + 0.16 CL
-
30 60 ns
tPLH
LOW to HIGH
nCP to nQ, nQ;
propagation delay see Figure 4
5V
10 V
[1] 68 + 0.55 CL
29 + 0.23 CL
-
95 190 ns
-
40 80 ns
15 V
22 + 0.16 CL
-
30 60 ns
nSD to nQ
5V
[1] 48 + 0.55 CL
-
75 150 ns
10 V
24 + 0.23 CL
-
35 70 ns
15 V
17 + 0.16 CL
-
25 50 ns
nCD to nQ
5V
[1] 33 + 0.55 CL
-
60 120 ns
10 V
19 + 0.23 CL
-
30 60 ns
15 V
12 + 0.16 CL
-
20 40 ns
tt
transition time
see Figure 4
5V
[1] 10 + 1.00 CL
-
60 120 ns
10 V
9 + 0.42 CL
-
30 60 ns
15 V
6 + 0.28 CL
-
20 40 ns
tsu
set-up time
nD to nCP;
see Figure 4
5V
10 V
40 20 - ns
25 10 - ns
15 V
15
5
- ns
th
hold time
nD to nCP;
see Figure 4
5V
10 V
20
0
- ns
20
0
- ns
15 V
15
0
- ns
tW
pulse width
nCP input LOW;
see Figure 4
5V
10 V
60 30 - ns
30 15 - ns
15 V
20 10 - ns
nSD input HIGH;
see Figure 5
5V
10 V
50 25 - ns
24 12 - ns
15 V
20 10 - ns
nCD input HIGH;
see Figure 5
5V
10 V
50 25 - ns
24 12 - ns
15 V
20 10 - ns
HEF4013B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 10 December 2015
© Nexperia B.V. 2017. All rights reserved
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