HEF4013B(2015) Ver la hoja de datos (PDF) - NXP Semiconductors.

Número de pieza

componentes Descripción

Fabricante

HEF4013B
(Rev.:2015)

Dual D-type flip-flop

NXP Semiconductors. 

Nexperia

HEF4013B

Dual D-type flip-flop

8. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).

Symbol Parameter

Conditions

Min

Max Unit

VDD

IIK

VI

IOK

II/O

IDD

Tstg

Tamb

Ptot

supply voltage

input clamping current

input voltage

output clamping current

input/output current

supply current

storage temperature

ambient temperature

total power dissipation

VI < 0.5 V or VI > VDD + 0.5 V

VO < 0.5 V or VO > VDD + 0.5 V

Tamb = 40 C to +125 C

SO14

[1]

0.5

-

0.5

-

-

-

65

40

-

+18 V

10

mA

VDD + 0.5 V

10

mA

10

mA

50

mA

+150 C

+125 C

500

mW

TSSOP14

[2]

-

500

mW

P

power dissipation

per output

-

100

mW

[1] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.

[2] For TSSOP14 packages: above Tamb = 60 C, Ptot derates linearly with 5.5 mW/K.

9. Recommended operating conditions

Table 5.

Symbol

VDD

VI

Tamb

t/V

Recommended operating conditions

Parameter

Conditions

supply voltage

input voltage

ambient temperature

input transition rise and fall rate

VDD = 5 V

VDD = 10 V

VDD = 15 V

Min

Max Unit

3

15 V

0

VDD V

40

+125 C

-

3.75 s/V

-

0.5 s/V

-

0.08 s/V

HEF4013B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 9 — 10 December 2015

© Nexperia B.V. 2017. All rights reserved

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