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SAA8103

Pulse Pattern Generator for Frame Transfer CCD (PPGFT)

Philips Electronics 

Philips Semiconductors

Pulse Pattern Generator for Frame Transfer

CCD (PPGFT)

8 FUNCTIONAL DESCRIPTION

The SAA8103 is a drive pulse generator for the FXA1004,

FXA1012, FXA1013, FXA1022, FTF2020, FTF3020 and

the FTT1010. The SAA8103 also drives the CDS, ADC

front-end, V-driver and the Digital Signal Processor (DSP).

The system block diagram is shown in Fig.2.

The SAA8103 generates horizontal and vertical drive

signals, summing and reset gate pulses for each CCD,

sample-hold pulses and clamp pulses for the front-end

devices TDA99xx and TDA87xx(1), and also generates

sync signals HD and VD and the reference signals HREF

and VREF for the DSP. The SAA8103 can also take sync

signals HD and VD as external inputs, the drive signals

generated will then be synchronized to these signals.

The SAA8103 is designed to operate with an 8192-line

(maximum) × 8192-pixel (maximum) RGB Bayer CCD

(FXA, FTF and FTT). Progressive scan and sub-sampling

modes for these CCDs can be used.

The device supports three different modes for the data

read-out of each CCD: Normal mode, Shot mode and

Preview mode. The SAA8103 also supports electronic

shutter function and will provide exact settings of shutter

speed and exposure time.

The drive signals for CCD are generated from the main

oscillator and range from 6 to 28 MHz. The drive signals

are generated by a programmable generator from the

main oscillator. The vertical drive signals are provided for

the TDA9991, horizontal drive signals are provided for the

CCD directly or H-driver, sample-hold pulses and clamp

pulses are provided for the TDA99xx or TDA87xx, sync

signals HD, VD and reference signals HREF and VREF

are provided for the DSP.

The drive pulses are controlled by a microcontroller via

one of the serial interfaces (I2C-bus or SNERT). The

SAA8103 takes address and data from the I2C-bus or

SNERT, and decodes these inputs for internal logic. It also

decodes these inputs for the SNERT interface of the

TDA99xx, TDA87xx and TDA9991.

The basic digital camera system consists of a CCD image

sensor, a vertical driver and a Pulse Pattern Generator

(PPG) for the CCD, an analog front-end (CDS, AGC and

ADC) and Digital Signal Processor.

The high resolution digital camera system can be built

using the FTF3020, TDA9965 and TDA9991 devices.

(1) TDA99xx = TDA9952; TDA9956; TDA9962; TDA9964;

TDA9965.

TDA87xx = TDA8783; TDA8784; TDA8786; TDA8787A

2001 Oct 22

9

Objective specification

SAA8103

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