DS1202 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated
Número de pieza
componentes Descripción
Fabricante
DS1202 Datasheet PDF : 11 Pages
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DS1202, DS1202S
10. ICC2 is specified with RST, I/O, and SCLK open. The clock halt flag must be set to logic one (oscillator disabled).
11. At power–up, RST must be at a logic 0 until VCCy2 volts. Also, SCLK must be at a logic 0 when RST is driven
to a logic one state.
12. If tCH exceeds 100 ms with RST in a logic one state, then ICC may briefly exceed ICC specification.
DS1202 SERIAL TIMEKEEPER 8–PIN DIP
8
5
B
1
4
A
C
F
K
E
G
D
PKG
DIM
A IN.
MM
B IN.
MM
C IN.
MM
D IN.
MM
E IN.
MM
F IN.
MM
G IN.
MM
H IN.
MM
J IN.
MM
K IN.
MM
8–PIN
MIN
0.360
MAX
0.400
0.240
0.260
0.120
0.140
0.300
0.325
0.015
0.040
0.110
0.140
0.090
0.110
0.320
0.370
0.008
0.012
0.015
0.021
J
H
032697 9/11
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