ML4827-1 Ver la hoja de datos (PDF) - Fairchild Semiconductor

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ML4827-1

Fault-Protected PFC and PWM Controller Combo

Fairchild Semiconductor 

ML4827

PRODUCT SPECIFICATION

2. A voltage proportional to the long-term RMS AC line

voltage, derived from the rectified line voltage after

scaling and filtering. This signal is presented to the gain

modulator at VRMS. The gain modulator’s output is

inversely proportional to VRMS2 (except at unusually

low values of VRMS where special gain contouring takes

over, to limit power dissipation of the circuit compo-

nents under heavy brownout conditions). The relation-

ship between VRMS and gain is termed K, and is

illustrated in the Typical Performance Characteristics.

3. The output of the voltage error amplifier, VEAO. The

gain modulator responds linearly to variations in this

voltage.

The output of the gain modulator is a current signal, in the

form of a full wave rectified sinusoid at twice the line fre-

quency. This current is applied to the virtual-ground (nega-

tive) input of the current error amplifier. In this way the gain

modulator forms the reference for the current error loop, and

ultimately controls the instantaneous current draw of the

PFC from the power line. The general form for the output of

the gain modulator is:

IGAINMOD = I--A----C---V--×--R---V-M---E-S---A2-----O--- × 1V

(1)

More exactly, the output current of the gain modulator is

given by:

IGAINMOD = K × (VEAO – 1.5V) × IAC

where K is in units of V-1.

Note that the output current of the gain modulator is limited

to ≅ 200µA.

Current Error Amplifier

The current error amplifier’s output controls the PFC duty

cycle to keep the average current through the boost inductor

a linear function of the line voltage. At the inverting input to

the current error amplifier, the output current of the gain

modulator is summed with a current which results from a

negative voltage being impressed upon the ISENSE pin (cur-

rent into ISENSE ≅ VSENSE/3.5kΩ). The negative voltage on

ISENSE represents the sum of all currents flowing in the PFC

circuit, and is typically derived from a current sense resistor

in series with the negative terminal of the input bridge recti-

fier. In higher power applications, two current transformers

are sometimes used, one to monitor the ID of the boost MOS-

FET(s) and one to monitor the IF of the boost diode. As

stated above, the inverting input of the current error amplifier

is a virtual ground. Given this fact, and the arrangement of

the duty cycle modulator polarities internal to the PFC, an

increase in positive current from the gain modulator will

cause the output stage to increase its duty cycle until the

voltage on ISENSE is adequately negative to cancel this

increased current. Similarly, if the gain modulator’s output

decreases, the output duty cycle will decrease, to achieve a

less negative voltage on the ISENSE pin.

VREF

PFC

OUTPUT

16

VEAO

VFB

15

VEA

–

2.5V +

IAC

2

VRMS

4

ISENSE

3

GAIN

MODULATOR

1

IEAO

IEA

+

+

–

–

Figure 2. Compensation Network Connections for the

Voltage and Current Error Amplifiers

Cycle-By-Cycle Current Limiter

The ISENSE pin, as well as being a part of the current feed-

back loop, is a direct input to the cycle-by-cycle current lim-

iter for the PFC section. Should the input voltage at this pin

ever be more negative than -1V, the output of the PFC will be

disabled until the protection flip-flop is reset by the clock

pulse at the start of the next PFC power cycle.

Overvoltage Protection

The OVP comparator serves to protect the power circuit

from being subjected to excessive voltages if the load should

suddenly change. A resistor divider from the high voltage

DC output of the PFC is fed to VFB. When the voltage on VFB

exceeds 2.7V, the PFC output driver is shut down. The PWM

section will continue to operate. The OVP comparator has

125mV of hysteresis, and the PFC will not restart until the

voltage at VFB drops below 2.58V. The VFB should be set at a

level where the active and passive external power compo-

nents and the ML4827 are within their safe operating volt-

ages, but not so low as to interfere with the boost voltage

regulation loop.

8

REV. 1.0.1 6/27/01

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