CA3228 Ver la hoja de datos (PDF) - Harris Semiconductor

Número de pieza

componentes Descripción

Fabricante

CA3228

Speed Control System with Memory

Harris Semiconductor 

CA3228

to be able to supply vacuum, the gate output must be low. If

the output from the Control Amplifier exceeds 0.573VCC,

vacuum is supplied to the servo unit. If the output of the

Control Amplifier is between 0.573VCC and 0.427VCC the

vacuum is held in the servo unit and vehicle speed is

maintained. If the output from the Control Amplifier drops

below 0.427VCC or if the gate output is high, the servo unit

vacuum is vented.

Overspeed Detector Comparator

The Overspeed Detector circuit is used when the following

sequence of events occur: A speed is set in memory, the

vehicle is manually accelerated (foot pedal) to a higher

speed and then the ACCEL switch is activated.

During vehicle acceleration VS voltage is greater than the VM

voltage into the memory update comparator. When the

ACCEL command is given, the capacitor at pin 15 rapidly

charges to within 60mV of VS before switching the compara-

tor output low and starting the fixed acceleration rate from

the present vehicle speed. The 60mV of offset is required to

insure that the output of the overspeed detector is low under

normal operating conditions. Hysteresis is also designed into

the comparator to eliminate noise problems which may

prevent the chip from going into the Acceleration mode.

End of Resume Comparator

The Resume Comparator is used when the following

sequence of events occurs: A speed is set in memory, the

brake applied, causing the vehicle to go to a lower speed,

and the RESUME switch is activated.

Activation of the RESUME switch causes a fixed accelera-

tion rate from the lower speed until the capacitor voltage at

pin 15 is equal to the VM voltage. A filter circuit contained in

the output of the resume comparator insures that noise

doesn’t reset the comparator until VPIN actually equals VM.

Align Voltage Source (Pin 17)

The Align Voltage Source is a X1 buffer with an output of

0.5VCC.

Brake Input Comparator (Pin 12)

When the Brake Input exceeds 0.55VCC, the chip will go into

the Standby mode from Cruise.

Minimum Speed Lockout

Assures that the system remains in a Standby mode if

vehicle speed VS is below 0.183VCC. It causes the system to

revert to the Standby mode if VS drops below 0.183VCC in

the Cruise mode.

Digital Filter for Redundant Brake and Minimum Speed

Lockout

A 4 bit shift register with an all ‘1’s output decode is used to

filter transients and electromagnetic interference. The filter

prevents false signals from putting the system into Standby

from Cruise.

Ramp Oscillator (Pin 5)

The Ramp Oscillator at pin 5 nominally varies between

amplitudes of 4.1V and 6.1V. The discharge rate is

approximately 4X the charge rate. With a capacitor of

0.001µF on pin 5, the nominal oscillator frequency is 50kHz.

10-37

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