BU9253AS Ver la hoja de datos (PDF) - ROHM Semiconductor
Número de pieza
componentes Descripción
Fabricante
BU9253AS Datasheet PDF : 17 Pages
| |||
●Description of operations
＜BU9253AS/FS＞
・OSC(Oscillator)
Clock is generated by connecting external RC circuit. Clock is used for the delay counter.
・Mute control circuit (MUTE)
By input voltage of the mute terminal, 3 statuses, that is, mute, mute release (operating), and clock stop & mute can be
selected.
・COUNTER
This counter is for generating delay time. It can generate delay time about 131ms at oscillation frequency
Fclk = 375kHz.
・SRAM
SRAM with 8Kbit capacity for generating the delay.
・A/D side LPF operation amplifier
LPF can be structured by external RC, and band limit of signal to be input to A/D is available.
・A/D
This digitalizes output signal of AD side LPF, and outputs it to SRAM.
・D/A side LPF operation amplifier
LPF can be structured by external RC, and band limit of signal to be output to D/A is available.
・D/A
This converts delayed audio digital data input from SRAM into analog signal.
・Mixing amplifier (MIX)
This circuit is used for mixing delayed signals and (original sound) signals input from MIX IN.
＜BU9262AFS＞
・Serial control circuit
This serial I/F circuit is for setting each register. It can be controlled by serial 16bit data. It reads in SI at the rise of SCK,
and latches data at the rise of SLT.
No.
Mode
D0
D1
Delay time
D2
D3
INPUT select
“ISEL”
D4
D5
OUTPUT select
“OSEL”
D6
D7
Delay out “DOSW”
D8
Delay volume
D9
“DLYVOL”
D10
D11
Feedback volume
D12
“FBVOL”
D13
D14
Latch control
Remarks
Delay time setting
"Refer to the separate table."
( D3、D4 ) = ( L、L )：L＋R
( L、L )：L－R
( L、H )：MIC
( H、H )：CLK OFF
( D5、D6 ) = ( L、L )：FWD (L, R in phase)
( L、L )：REV (R in opposite phase)
( L、H )：MIC MIX
( H、H )：NORMAL
H : output ON
L : output OFF
Delay signal / volume setting
"Refer to the separate table."
Feedback / volume setting
"Refer to the separate table."
(D5, D6) = (L, H) : latch
Others are not latch
9/16
Share Link: 