M5M44405CJ-5 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

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M5M44405CJ-5

EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM

MITSUBISHI ELECTRIC  

MITSUBISHI LSIs

M5M44405CJ,TP-5,-6,-7,-5S,-6S,-7S

EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM

FUNCTION

The M5M44405CJ, TP provide, in addition to normal read, write,

and read-modify-write operations,a number of other functions, e.g.,

hyper page mode, RAS-only refresh, and delayed-write. The input

conditions for each are shown in Table 1.

Table 1 Input conditions for each mode

Read

Operation

RAS

ACT

CAS

ACT

Inputs

W

NAC

OE

ACT

Row

address

APD

Column

address

APD

Write (Early write)

ACT ACT ACT DNC APD APD

Write (Delayed write)

ACT ACT ACT NAC APD APD

Read-modify-write

ACT ACT ACT ACT APD APD

RAS-only refresh

ACT NAC DNC DNC APD DNC

Hidden refresh

ACT ACT DNC ACT DNC DNC

CAS before RAS refresh

ACT ACT NAC DNC DNC DNC

Self refresh *

ACT ACT NAC DNC DNC DNC

Stand-by

NAC DNC DNC DNC DNC DNC

Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : invalid, APD : applied, OPN : open

Input/Output

Input Output

OPN VLD

APD OPN

APD IVD

APD VLD

DNC OPN

OPN VLD

DNC OPN

DNC

DNC

OPN

OPN

Refresh Remark

YES

YES

YES

YES

YES

YES

YES

YES

NO

Hyper-

Page

mode

identical

BLOCK DIAGRAM

COLUMN ADDRESS

STROBE INPUT CAS

ROW ADDRESS RAS

STROBE INPUT

WRITE CONTROL W

INPUT

A0

A1

A2

A3

A4

ADDRESS INPUTS A5

A6

A7

A8

A9

CLOCK GENERATOR

CIRCUIT

A0~A9

COLUMN DECODER

ROW &

COLUMN

ADDRESS

BUFFER

A0~ ROW

A9 DECODER

SENSE REFRESH

AMPLIFER & I /O CONTROL

MEMORY CELL

(4,194,304 BITS)

(4)

DATA IN

BUFFERS

(4)

DATA OUT

BUFFERS

VCC (5V)

VSS (0V)

DQ1

DQ2 DATA

DQ3 INPUTS / OUTPUTS

DQ4

OE

OUTPUT

INPUT

ENABLE

M5M44405CJ,TP-5,-5S:Under development

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