MH16V64AWJ-5 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC
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MH16V64AWJ-5
MITSUBISHI ELECTRIC
MH16V64AWJ-5 Datasheet PDF : 20 Pages
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Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH16V64AWJ -5, -6
FAST PAGE MODE 1073741824 - BIT ( 16777216 - WORD BY 64 - BIT ) DYNAMIC RAM
Read and Refresh Cycles
Symbol
Parameter
tRC
tRAS
tCAS
tCSH
tRSH
tRCS
tRCH
tRRH
tRAL
tORH
tOCH
Read cycle time
/RAS low pulse width
/CAS low pulse width
/CAS hold time after /RAS low
/RAS hold time after /CAS low
Read Setup time after /CAS high
Read hold time after /CAS low
Read hold time after /RAS low
Column address to /RAS hold time
/RAS hold time after /OE low
/CAS hold time after /OE low
Limits
-5
-6
Unit
Min
Max
Min
Max
90
110
ns
50
10000
60
10000
ns
15
10000
15
10000
ns
50
60
ns
15
15
ns
0
0
ns
(Note 21)
0
0
ns
(Note 21) 10
10
ns
25
30
ns
13
15
ns
13
15
ns
Note 21: Either tRCH or tRRH must be satisfied for a read cycle.
Write Cycle (Early Write and Delayed Write)
Limits
Symbol
Parameter
-5
-6
Unit
Min
Max
Min
Max
tWC
Write cycle time
90
110
ns
tRAS /RAS low pulse width
50
10000
60
10000
ns
tCAS /CAS low pulse width
15
10000
15
10000
ns
tCSH /CAS hold time after /RAS low
50
60
ns
tRSH /RAS hold time after /CAS low
15
15
ns
tWCS Write setup time before /CAS low
(Note 23)
0
0
ns
tWCH Write hold time after /CAS low
10
10
ns
tCWL /CAS hold time after /W low
15
15
ns
tRWL /RAS hold time after /W low
15
15
ns
tWP
Write pulse width
10
10
ns
tDS
Data setup time before /CAS low or /W low
0
0
ns
tDH
Data hold time after /CAS low or /W low
10
10
ns
tOEH /OE hold time after /W low
13
15
ns
Read-Write and Read-Modify-Write Cycles
Symbol
Parameter
Limits
-5
-6
Unit
Min
Max
Min
Max
tRWC Read write/read modify write cycle time (Note22) 130
150
ns
tRAS
tCAS
tCSH
/RAS low pulse width
/CAS low pulse width
/CAS hold time after /RAS low
85
10000
95
10000
ns
50
10000
50
10000
ns
85
95
ns
tRSH /RAS hold time after /CAS low
50
50
ns
tRCS Read setup time before /CAS low
0
0
ns
tCWD Delay time, /CAS low to /W low
(Note23)
30
30
ns
tRWD Delay time, /RAS low to /W low
(Note23)
65
75
ns
tAWD Delay time, address to /W low
(Note23)
40
45
ns
tOEH /OE hold time after /W low
10
15
ns
tCWL /CAS hold time after /W low
15
15
ns
tRWL /RAS hold time after /W low
15
15
ns
tWP
Write pulse width
10
10
ns
tDS
Data setup time before /CAS low or /W low
0
0
ns
tDH
Data hold time after /CAS low or /W low
10
10
ns
Note 22:tRWC is specified as tRWC(min)=tRAC(max)+tODD(min)+tRWL(min)+tRP(min)+4tT.
24:tWCS, tCWD,tRWD ,tAWD and,tCPWD are specified as reference points only. If tWCS≥tWCS(min) the cycle is an early write cycle and the DQ pins will remain
high impedance throughout the entire cycle. If tCWD≥tCWD(min), tRWD≥tRWD (min), tAWD≥tAWD(min) and tCPWD ≥tCPWD(min) (for Hyper page mode cycle only),
the cycle is a read-modify-write cycle and the DQ will contain the data read from the selected address. If neither of the above condition (delayed write) of the DQ (at access
time and until /CAS or /OE goes back to VIH) is indeterminate.
MIT-DS-0108-0.5
MITSUBISHI
ELECTRIC
( 8 / 20 )
26/Feb./1997
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