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ELH0033G/883B Ver la hoja de datos (PDF) - Elantec -> Intersil

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ELH0033G/883B
Elantec
Elantec -> Intersil Elantec
ELH0033G/883B Datasheet PDF : 12 Pages
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ELH0033G 883 8001401ZX
Fast Buffer Amplifier
Applications Information
Recommended Layout Precautions
RF video printed circuit board layout rules
should be followed when using the ELH0033
since it will provide power gain to frequencies
over 100 MHz Ground planes are recommended
and power supplies should be decoupled at each
device with low inductance capacitors In addi-
tion ground plane shielding may be extended to
the metal case of the device since it is electrically
isolated from internal circuitry Alternatively
the case should be connected to the output to
minimize input capacitance
Offset Voltage Adjustment
The ELH0033’s offset voltages have been active-
ly trimmed by laser to meet guaranteed specifica-
tions when the offset preset pin is shorted to the
offset adjust pin The pre-calibration allows the
devices to be used in most DC or AC applications
without individually offset nulling each device If
offset null is desirable it is simply obtained by
leaving the offset preset pin open and connecting
a trim pot of 100X between the offset adjust pin
and Vb
Operation from Single or Asymmetrical
Power Supplies
This device type may be readily used in applica-
tions where symmetrical supplies are unavailable
or not desirable A typical application might be
an interface to a MOS shift register where Va e
a5V and Vb e b12V In this case an apparent
output offset occurs due to the device’s voltage
gain of less than unity This additional output
offset error may be predicted by
(V a bVb)
DVOj(1bAV)
e0 005 (VabVb)
2
where AV e No load voltage gain typically 0 99
Va e Positive supply voltage
Vb e Negative supply voltage
For the above example DVO would be b35 mV
This may be adjusted to zero as described in Sec-
tion 2 For AC coupled applications no addition-
al offset occurs if the DC input is properly biased
as illustrated in the ‘‘typical applications’’ sec-
tion
Short Circuit Protection
In order to optimize transient response and out-
put swing output current limit has been omitted
from the ELH0033 Short circuit protection may
be added by inserting appropriate value resistors
between Va and VCa pins and Vb and VCb
pins Resistor values may be predicted by
Va Vb
RLIM j ISC e ISC
where ISC s 100 mA for ELH0033
The inclusion of limiting resistors in the collec-
tors of the output transistors reduces output volt-
age swing Decoupling VCa and VCb pins with
capacitors to ground will retain full output swing
for transient pulses An alternate active current
limit technique that retains full DC output swing
uses current sources which are saturated during
normal operation thus applying full supply volt-
age to the VC pins Under fault conditions the
voltage decreases as required by the overload
RLIM
j
VBE
ISC
e
0
60
6V
mA
e
10X
Capacitive Loading
The ELH0033 is designed to drive capacitive
loads such as coaxial cables in excess of several
thousand picofarads without susceptibility to os-
cillation However peak current resulting from
(C c dv dt) should be limited below absolute
maximum peak current ratings for the devices
Thus
DVIN
Dt
c
CL
s
IOUT
s
g250
mA
In addition power dissipation resulting from
driving capacitive loads plus standby power
should be kept below the total package power
rating
PD pkg t PDC a PAC
PD pkg t (Va b Vb) c IS a PAC
PAC j (VP-P)2 c f c CL
6

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