IDT74FCT162501AT(2009) Ver la hoja de datos (PDF) - Integrated Device Technology
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IDT74FCT162501AT Datasheet PDF : 7 Pages
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IDT74FCT162501AT/CT
FAST CMOS 18-BIT REGISTERED TRANSCEIVER
PIN CONFIGURATION
OEAB
1
LEAB
2
A1
3
GND
4
A2
5
A3
6
VCC
7
A4
8
A5
9
A6
10
GND
11
A7
12
A8
13
A9
14
A10
15
A11
16
A12
17
GND
18
A13
19
A14
20
A15
21
VCC
22
A16
23
A17
24
GND
25
A18
26
OEBA
27
LEBA
28
56
GND
55
CLKAB
54
B1
53
GND
52
B2
51
B3
50
VCC
49
B4
48
B5
47
B6
46
GND
45
B7
44
B8
43
B9
42
B10
41
B11
40
B12
39
GND
38
B13
37
B14
36
B15
35
VCC
34
B16
33
B17
32
GND
31
B18
30
CLKBA
29
GND
SSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
Description
OEAB
OEBA
A-to-B Output Enable Input
B-to-A Output Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input
LEBA
B-to-A Latch Enable Input
CLKAB
A-to-B Clock Input
CLKBA
Ax
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
Bx
B-to-A Data Inputs or A-to-B 3-State Outputs
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to 7
V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature
–65 to +150
°C
IOUT DC Output Current
–60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
CIN
Input Capacitance
VIN = 0V
3.5
6 pF
COUT
Output Capacitance VOUT = 0V 3.5
8
pF
NOTE:
1. This parameter is measured at characterization but not tested.
FUNCTION TABLE(1, 4)
Inputs
Outputs
OEAB
LEAB
CLKAB
Ax
Bx
L
X
X
X
Z
H
H
X
L
L
H
H
X
H
H
H
L
↑
L
L
H
L
↑
H
H
H
L
L
X
B(2)
H
L
H
X
B(3)
NOTES:
1. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA,
and CLKBA.
2. Output level before the indicated steady-state input conditions were established.
3. Output level before the indicated steady-state input conditions were established,
provided that CLKAB was HIGH before LEAB went LOW.
4. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
↑ = LOW-to-HIGH Transition
2
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