MC144144P Ver la hoja de datos (PDF) - Motorola => Freescale

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MC144144P

Enhanced Closed-Caption Decoder CMOS

Motorola => Freescale 

AC AND TIMING CHARACTERISTICS (continued)

Parameter

Conditions

Horizontal Timing

The timing of the ouput signals box

and RGB have been set to make a

centered display.

The positioning of these outputs can be adjusted in 330 ns increments by writing a

new value to the H Position Register.

Control Port Signals – Two–Wire Serial Mode (SMS = LOW, SEN = HIGH) (See Figure 10)

Clock and Data Transitions: The SCK

and SDA bus lines are normally pulled

high with a resistor. Data on the SDA

bus may only change during SCK low

time periods. Data changes during

SCK high periods will indicate a start

or stop condition.

Start Condition: A high–to–low transition of SDA with SCK high is a start condition

which must precede any other command.

Stop Condition: A low–to–high transition of SDA with SCK high is a stop condition

which terminates all communications.

Acknowledge: All address and data

words are serially transmitted to and

from the MC144144 in eight bit words.

A ninth bit time is used for the

acknowledge.

The acknowledging device does so by pulling the SDA bus low during the ninth

bit.

Control Port Signals – Three–Wire Serial Mode (SMS = HIGH) (See Figure 11)

Three–wire bus with Clock signal on

SCK pin, Serial Data Input on SDA

pin and Serial Data Output on SDO

pin.

SEN pin LOW disabled the port, placing SDO in three–state. Signal transitions on

SCK and SDA are ignored.

SEN pin HIGH enables the port for operation.

SEN and SMS pins LOW is a hardware reset for the part. These pins must be held

low for at least 100 ns.

Serial synchronization can be established by clocking in the minimum required

SSR string of FFh, FFh, FEh. More than two bytes of FFh may be input but the

string must end with FEh.

MOTOROLA

MC144144

5

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