AD1955 Ver la hoja de datos (PDF) - Analog Devices

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AD1955

High Performance Multibit Σ∆ DAC with SACD Playback

Analog Devices 

PRELIMINARY TECHNICAL DATA

AD1955

Left and Right channel data are valid on rising edge of EF_BCLK. After LSB data is clocked in the AD1955, the falling edge of

EF_WCLK signal loads all of data and starts conversion. The mode can be set to Left or Right-justified. A burst mode BCLK is also

acceptable in Left-justified mode.

LR CLK

B C LK

SDATA

LR CLK

B C LK

SDATA

LR CLK

B C LK

SDATA

M SB

LEFT C HANNEL

R IG H T C H A N N E L

LSB

M SB

I2 S M O D E - 1 6 T O 2 4 -B IT S P E R C H A N N E L

LEFT C HANNEL

R IG H T C H A N N E L

M SB

LSB

M SB

R IG H T J U S T IF IE D M O D E - S E L E C T N U M B E R O F B IT S P E R C H A N N E L

LSB

LSB

M SB

LSB

M SB

D S P M O D E - 1 6 T O 2 4-B IT S P E R C H A N N E L

LSB

LR CLK

B C LK

SDATA

M SB

LEFT C HANNEL

LSB

M SB

LE F T JU S T IF IE D M O D E - 16 T O 24 -B IT S P E R C H A N N E L

R IG H T C H A N N E L

LSB

1/F s

N O T E S : 1 . D S P M O D E D O E S N 'T ID E N T IF Y C H A N N E L

2 . L R C L K N O R M A L L Y O P E R A T E S A T F s E X C E P T F O R D S P M O D E W H IC H IS 2 x F s

3 . B C LK F R E Q U E N C Y IS N O R M A L LY 64x LR C LK B U T M A Y B E O P E R A T E D IN B U R S T M O D E

Figure 1. Supported Serial Data Formats

Rev. PrF

Figure 2. Serial Data Port Timing

-7-

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