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AD12400(Rev0) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza
componentes Descripción
Fabricante
AD12400
(Rev.:Rev0)
ADI
Analog Devices ADI
AD12400 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD12400
AD12400JWS
AD12400KWS
LOGIC OUTPUTS
Output Drive Current
Full
IV
−4
+4
−4
+4
mA
Output Common-Mode
Full
IV
Voltage
1.125
1.375 1.125
1.375 V
Start-Up Time
Full
IV
600
1 Tested using input frequency of 70 MHz. See Figure 17 for I(VD) variation vs. input frequency.
2 All ac specifications tested by driving ENC single-ended.
3 Refer to Table 5 for logic convention on all logic inputs.
4 Digital Output Logic Levels: DR V = 3.3 V, CLOAD = 8 pF. 3.3 V LVDS R1 = 100 Ω.
Specifications subject to change without notice.
600
ms
AC SPECIFICATIONS1
Table 2. VA = 3.8 V, VC = 3.3 V, VD = 1.5 V, Encode = 400 MSPS, 0°C ≤ TCASE ≤ 60°C, unless otherwise noted.
AD12400JWS
AD12400KWS
Parameter
Case Temp
Test Level
Min Typ Max Min Typ Max
DYNAMIC PERFORMANCE2
SNR
Analog Input 10 MHz
Full
I
62
64.4
62
64.4
@ −1.0 dBFS 70 MHz
Full
I
61.5 64
61.5 64
128 MHz
Full
I
60
63.5
60
63.5
180 MHz
Full
I
60
62.5
60
62.5
SINAD3
Analog Input 10 MHz
Full
I
61
64
61
64
@ −1.0 dBFS 70 MHz
Full
I
60.5 64
60.5 64
128 MHz
Full
I
59
62.5
59
62.5
180 MHz
Full
I
57
61
57
61
Spurious-Free Dynamic Range3
Analog Input 10 MHz
Full
I
69
80
69
80
@ −1.0 dBFS 70 MHz
Full
I
69
84
69
84
128 MHz
Full
I
67
76
67
76
180 MHz
Full
I
62
71
62
71
Image Spur4
Analog Input
10 MHz
Full
I
60
75
62
75
@ −1.0 dBFS
70 MHz
Full
I
60
72
62
72
128 MHz
Full
I
56
70
62
70
180 MHz
Full
I
54
70
62
70
Offset Spur4
60°C
V
65
65
Analog Input @ −1.0 dBFS
Two-Tone IMD5
F1, F2 @ −6 dBFS
60°C
V
−75
−75
SWITCHING SPECIFICATIONS
Conversion Rate6
Full
IV
396 400 404 396 400 404
Encode Pulsewidth High (tEH)1
60°C
V
Encode Pulsewidth Low (tEL)1
60°C
V
1.25
1.25
1.25
1.25
DIGITAL OUTPUT PARAMETERS
Valid Time (tV)
Full
IV
1.9 2.4 3.1
1.9 2.4 3.1
Propagation Delay (tPD)
60°C
V
1.20
1.20
Rise Time (tR) (20% to 80%)
60°C
V
1
1
Fall Time (tF) (20% to 80%)
60°C
V
1
1
Unit
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
MSPS
ns
ns
ns
ns
ns
ns
Rev. 0 | Page 4 of 28

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