MSM82C51A Ver la hoja de datos (PDF) - Oki Electric Industry

Número de pieza

componentes Descripción

Fabricante

MSM82C51A

UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER

Oki Electric Industry 

¡ Semiconductor

MSM82C51A-2RS/GS/JS

Status Word

It is possible to see the internal status of MSM82C51A-2 by reading a status word.

The bit configuration of status word is shown in Fig. 5.

D7

D6

D5

D4

D3

D2

D1

D0

DSR

SYNDET

/BD

FE

OE

PE TXEMPTY RXRDY TXRDY

Parity Different from

TXRDY Terminal.

Refer to "Explanation"

of TXRDY Terminals.

Same as terminal.

Refer to "Explanation"

of Terminals.

1ºParity Error

1ºOverrun Error

1ºFraming Error

Note: Only asynchronous mode.

Stop bit cannot be detected.

Shows Terminal DSR

1ºDSR = 0

0ºDSR = 1

Fig. 5 Bit Configuration of Status Word

Standby Status

It is possible to put the MSM82C51A-2 in “standby status”

When the following conditions have been satisfied the MSM82C51A-2 is in “standby status.”

(1) CS terminal is fixed at Vcc level.

(2) Input pins other CS , D0 to D7, RD, WR and C/D are fixed at Vcc or GND level (including

SYNDET in external synchronous mode).

Note: When all output currents are 0, ICCS specification is applied.

8/26

Share Link: