74LCX00YMTR(2012) Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza

componentes Descripción

Fabricante

74LCX00YMTR
(Rev.:2012)

Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs

STMicroelectronics 

74LCX00

Electrical characteristics

Table 8.

AC electrical characteristics

Test condition

Value

Symbol

Parameter

VCC

CL

RL

ts = tr -40 to 85 °C Unit

(V)

(pF)

(Ω)

(ns) Min. Max.

tPLH tPHL

Propagation delay

time

2.7

3.0 to 3.6

50

500

5.1

2.5

ns

1.0 4.3

tOSLH

tOSHL

Output-to-output

skew time(1), (2)

3.0 to 3.6

50

500

2.5

1.0

ns

1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two

outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|,

tOSHL = | tPHLm - tPHLn|).

2. Parameter guaranteed by design.

Table 9.

Capacitive characteristics

Test condition

Value

Symbol

Parameter

VCC

(V)

TA = 25 °C

Min. Typ. Max.

Unit

CIN Input capacitance

3.3

VIN = 0 to VCC

6

pF

CPD

Power dissipation

capacitance(1)

3.3

fIN = 10 MHz

VIN = 0 or VCC

35

pF

1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the

operating current consumption without load. (Refer to Section 5: Test circuit). Average operating current

can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate).

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