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KBMF01SC6 Ver la hoja de datos (PDF) - STMicroelectronics

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KBMF01SC6 Datasheet PDF : 8 Pages
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KBMFxxSC6
To have a good approximation of the remaining voltages at both Vinput and Voutput stages, we give the
typical dynamical resistance value Rd. By taking into account these following hypothesis : Rt>Rd, Rg>Rd
and Rload>Rd, it gives these formulas:
Vinput = Rg.VBR + Rd.Vg
Rg
Voutput = RS.VBR + Rd.Vinput
Rt
The results of the calculation done for VPP=8kV, Rg=330(IEC 61000-4-2 standard), Vbr=7V
(typ.) and Rd = 1ohm (typ.) give:
Vinput = 31.2 V
Voutput = 7.8 V
This confirms the very low remaining voltage across the device to be protected. It is also important to note
that in this approximation the parasitic inductance effect was not taken into account. This could be few
tenths of volts during few ns at the input side. This parasitic effect is not present at the output side due the
low current involved after the resistance RS.
The measurements done here after show very clearly (Fig. A5) the high efficiency of the ESD protection :
- no influence of the parasitic inductances on output stage
- Voutput clamping voltage very close to Vbr (positive strike) and -Vf (negative strike)
Fig. A4: Measurement conditions
ESD
SURGE
16kV
Air
Discharge
TEST BOARD
Vin
Vout
4/8

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