SM9103M Ver la hoja de datos (PDF) - Nippon Precision Circuits
Número de pieza
componentes Descripción
Fabricante
SM9103M Datasheet PDF : 14 Pages
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SM9103M
Parameter
Condition
TSUB gain switching absolute accuracy
VOUT = VREF ±
0.8 V
−16 to +8 dB
+10 to +14 dB
1. TSUB = K × {[IT1 + IT2] − [IT3 + IT4]}, gain = 0 dB
2. TADD = K × [IT1 + IT2 + IT3 + IT4]
3. DPDA = K × IT1, DPDB = K × IT2, DPDC = K × IT3, DPDD = K × IT4
4. T1, T2, T3, T4: 10 pF input load capacitance
TSUB, TADD, DPDA, DPDB, DPDC, DPDD: 10 pF output load capacitance
TSUB, TADD: 10 kΩ load resistance
DPDA, DPDB, DPDC, DPDD: 100 kΩ load resistance
Focus PD Input Characteristics (F1, F2)
VCC = 5 V ± 5%, GND = 0 V, Ta = 0 to 70 °C
Rating
min
typ
max
–
–
±0.5
–
–
±1.0
Parameter
Condition
Rating
min
typ
max
Input impedance
Input conversion noise current
No signal
DC to 10 kHz
–
RAM read1
–
ROM read1
–
RAM write1
–
–
250
–
24
–
96
–
150
Pin voltage
No signal, VREF reference
–
–
±50
1. Conversion from FSUB output noise value when 14 pF capacitors connected to F1 and F2
Focus Signal Processor Characteristics
VCC = 5 V ± 5%, GND = 0 V, Ta = 0 to 70 °C
Parameter
Condition
Rating
min
typ
max
RAM read
370
415
460
FSUB current-to-voltage converter
coefficient1
ROM read
Rf = 22 kΩ,
VOUT = VREF ± 0.35 V
94
RAM write
58
105
116
65
72
FADD current-to-voltage converter
coefficient2
RAM read
ROM read
RAM write
Rf = 27 kΩ
223
250
277
56.1
63
69.9
35.6
40
44.1
F1, F2 converter coefficient relative error FSUB output, RAM/ROM read
–
–
±2
FSUB, FADD output impedance
–
–
100
FSUB operating output voltage
10 kΩ load connected to VREF
1
–
3
FADD operating output voltage
Converter coefficient switching time
FSUB, FADD signal bandwidth3
FSUB, FADD gain peaking3
FSUB, FADD phase response3
10 kΩ load connected to VREF
RAM read ↔ ROM read
RAM write ↔ RAM read
DC to −3 dB frequency
f = 10 kHz to −3 dB frequency
@ f = 10 kHz
VREF
–
3
–
–
10
–
–
3
200
–
–
−3
–
+0.5
–
–
5
Unit
dB
Unit
Ω
nArms
mV
Unit
kΩ
kΩ
%
Ω
V
V
ms
µs
kHz
dB
°
NIPPON PRECISION CIRCUITS—8
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