CA2524F Ver la hoja de datos (PDF) - Intersil
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CA2524F Datasheet PDF : 16 Pages
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CA1524, CA2524, CA3524
Circuit Description
Voltage Reference Section
The CAl524 series contains an internal series voltage regu-
lator employing a zener reference to provide a nominal 5-volt
output, which is used to bias all internal timing and control
circuitry. The output of this regulator is available at terminal
l6 and is capable of supplying up to 50mA output current.
Figure 1 shows the temperature variation of the reference
voltage with supply voltages of 8V to 40V and load currents
up to 20mA. Load regulation and line regulation curves are
shown in Figures 2 and 3, respectively.
5.02
5.00
4.98
V+ = 40V, IL = 0mA
V+ = 20V, IL = 0mA
V+ = 40V, IL = 20mA
V+ = 8V, IL = 0mA
V+ = 20V, IL = 20mA
V+ = 8V, IL = 20mA
Osclllator Section
Transistors Q42, Q43 and Q44, in conjunction with an
external resistor RT, establishes a constant charging current
into an external capacitor CT to provide a linear ramp voltage
at terminal 7. The ramp voltage has a value that ranges from
0.6V to 3.5V and is used as the reference for the comparator
in the device. The charging current is equal to (5-2VBE)/RT or
approximately 3.6/RT and should be kept within the range of
30pA to 2mA by varying RT. The discharge time of CT deter-
mines the pulse width of the oscillator output pulse at termi-
nal 3. This pulse has a practical range of 0.5µs to 5µs for a
capacitor range of 0.001 to 0.1µF. The pulse has two internal
uses: as a dead-time control of blanking pulse to the output
stages to assure that both outputs cannot be on simulta-
neously and as a trigger pulse to the internal flip-flop which
controls the switching of the output between the two output
channels. The output dead-time relationship is shown in Fig-
ure 4. Pulse widths less than 0.5µs may allow false trigger-
ing of one output by removing the blanking pulse prior to a
stable state in the flip-flop.
4.96
-60 -40 -20 0 20 40 60 80 100 120 140
AMBIENT TEMPERATURE (oC)
FIGURE 1. TYPICAL REFERENCE VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
100
TA = +25oC
V+ = 8V - 40V
10
5.1
V+ = 40V
4.9
4.7
4.5
4.3
4.1 TA = +25oC
V+ = 20V
3.9
3.7
V+ = 20V
V+ = 8V
3.5
0
8 16 24 32 40 48 56 64 72 80
REFERENCE OUTPUT CURRENT (mA)
FIGURE 2. TYPICAL REFERENCE VOLTAGE AS A FUNCTION
OF REFERENCE OUTPUT CURRENT
8
7 TA = +25oC
6
5
4
3
2
1
0
0
10
20
30
40
SUPPLY VOLTAGE, V+ (V)
FIGURE 3. TYPICAL REFERENCE VOLTAGE AS A FUNCTION
OF SUPPLY VOLTAGE
1.0
0.1
0.0001 0.001
0.01
0.1
1.0
TIMING CAPACITOR, CT (µF)
FIGURE 4. TYPICAL OUTPUT STAGE DEAD TIME AS A
FUNCTION OF TIMING CAPACITOR VALUE
If a small value of CT must be used, the pulse width can be
further expanded by the addition of a shunt capacitor in the
order of 100pF but no greater than 1000pF, from terminal 3
to ground. When the oscillator output pulse is used as a sync
input to an oscilloscope, the cable and input capacitances
may increase the pulse width slightly. A 2-KΩ resistor at
terminal 3 will usually provide sufficient decoupling of the
cable. The upper limit of the pulse width is determined by the
maximum duty cycle acceptable.
The oscillator period is determined by RT and CT, with an
approximate value of t = RTCT, where RT is in ohms, CT is in
µF, and t is in µs. Excess lead lengths, which produce stray
capacitances, should be avoided in connecting RT and CT to
their respective terminals. Figure 5 provides curves for
selecting these values for a wide range of oscillator periods.
For series regulator applications, the two outputs can be
connected in parallel for an effective 0-90% duty cycle with
the output stage frequency the same as the oscillator
frequency. Since the outputs are separate, push-pull and
flyback applications are possible. The flip-flop divides the
frequency such that the duty cycle of each output is 0-45%
and the overall frequency is half that of the oscillator. Curves
7
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