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74AHC273-Q100 Datasheet PDF : 19 Pages
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NXP Semiconductors
74AHC273-Q100; 74AHCT273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
6. Functional description
Table 3. Function table[1]
Operating mode
Reset (clear)
Load ‘1’
Load ‘0’
Control
MR
CP
L
X
H
H
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
= LOW-to-HIGH;
X = don’t care.
7. Limiting values
Input
Dn
X
h
l
Output
Qn
L
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
VI
input voltage
IIK
input clamping current
VI < 0.5 V
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
IO
output current
VO = 0.5 V to (VCC + 0.5 V)
0.5
+7.0
V
0.5
+7.0
V
[1] 20
-
mA
[1] 20
+20
mA
25
+25
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
Tamb = 40 C to +125 C
-
75
65
[2] -
+75
mA
-
mA
+150
C
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO20 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.
For TSSOP20 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN20 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K.
74AHC_AHCT273_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 27 March 2013
© NXP B.V. 2013. All rights reserved.
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