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74AHC273-Q100 Datasheet PDF : 19 Pages
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NXP Semiconductors
74AHC273-Q100; 74AHCT273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
5. Pinning information
5.1 Pinning
74AHC273-Q100
74AHCT273-Q100
MR 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
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Fig 5. Pin configuration SO20 and TSSOP20
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4
4
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4
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4
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4
4
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4
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(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 6. Pin configuration DHVQFN20
5.2 Pin description
Table 2. Pin description
Symbol
MR
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7
D0, D1, D2, D3, D4, D5, D6, D7
GND
CP
VCC
Pin
1
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18
10
11
20
Description
master reset input (active LOW)
flip-flop output
data input
ground (0 V)
clock input (LOW-to-HIGH edge-triggered)
supply voltage
74AHC_AHCT273_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 27 March 2013
© NXP B.V. 2013. All rights reserved.
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