ZABG4002 Ver la hoja de datos (PDF) - Diodes Incorporated.

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componentes Descripción

Fabricante

ZABG4002

Advanced Low Power Four-Stage GaAs FET Bias IC

Diodes Incorporated. 

Applications Circuit

NOT RECOMMENDED FOR NEW DESIGN

USE ZABG4003

ZABG4002

L*

C*

JF1

L*

C*

C1

10nF

C2

10nF

* Stripline Elements

Vcc

D2

G2

VcCCc

GGNnDd

ZABG4002

G3

D4

G4

RRcCAaLl11

CCNNBB

47nF

CCSSUUBB

47nF

RRCCAAL2L2

39k

RRCCAAL1L1

39k

Applications Information

Above is a partial applications circuit for the ZABG4002 showing all external components needed for biasing one of the four FET stages available.

Each bias stage is provided with a gate and drain pin. The drain pin provides a regulated 2.0V supply that includes a drain current monitor. The

drain current taken by the external FET is compared with a user selected level, generating a signal that adjusts the gate voltage of the FET to

obtain the required drain current. If for any reason, an attempt is made to draw more than the user set drain current from the drain pin, the drain

voltage will be reduced to ensure excess current is not taken. The gate pin drivers are also current limited.

The bias stages are split up into two pairs, with the drain current of each pair set by an external RCAL resistor. RCAL1 sets the drain currents of

stages 1 and 3, whilst RCAL2 sets the drain currents of stages 2 and 4. This allows the optimisation of drain currents for differing tasks such as

input stages where noise can be critical and later amplifier stages where gain may be more important. A graph showing the relationship between

the value of RCAL and ID is provided in the Typical Characteristics section of this datasheet. The RCAL pins can also be used as logic inputs. If set

to a logic high state (>3.0V), the associated FET bias stages are disabled, driving gate pins to -2.5V and switching drain pins open-circuit. This

feature can be used as part of a power management system that turns off any unwanted stages in a multi input receiver.

The ZABG4002 includes a switched capacitor DC-DC converter that is used to generate the negative supply required to bias depletion mode FETs

used in common source circuit configuration as shown above. This converter uses two external capacitors, CNB the charge transfer capacitor and

CSUB the output reservoir capacitor. The circuit provides a regulated -2.5V supply both for gate driver use and for external use if required (for extra

discrete bias stages, mixer bias, local oscillator bias etc.). The -2.5V supply is available from the CSUB pin.

If any bias stages are not required, their gate and drain pins may be left open circuit. If all bias stages associated with an RCAL resistor are not

required, then this resistor may be omitted.

To ease PCB layout, the pinout for the ZABG4002 includes two VCC pins. These pins are internally connected so only one of the pins needs to be

powered for the device to function. It is probable that the extra pin will help avoid the need for trace cross-over components or ground plane

disruption from reverse side PCB links. Note that the exposed pad of the package must be either left floating or connected to CSUB.

ZABG4002

Document number: DS32047 Rev. 3 - 3

5 of 7

www.diodes.com

January 2019

© Diodes Incorporated

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