YSS950 Ver la hoja de datos (PDF) - Yamaha Corporation

Número de pieza

componentes Descripción

Fabricante

YSS950

Digital Audio Processor

Yamaha Corporation 

YSS950

■ Comparison of Yamaha audio DSP

Chip Name

Function

Dolby digital decoding

Dolby Digital EX decoding

AAC decoding

PCM input playback

Dolby Pro Logic II decoding

Dolby Pro Logic IIx decoding

DTS decoding

DTS 96/24 decoding

DTS-ES decoding

DTS Neo:6 decoding

Tone control

Bass management

Volume adjustment

Noise generation

Impulse generation

Dynamic range controller

Harmonics regenerator

Nch surround

Sound field

Virtual surround

Headphone surround

Parametric equalizer

Graphic equalizer

Channel divider

Automatic acoustic calibration

Down mixing

Mixer

Down sampling

DAP1

YSS950

N

N

N

Y (up to 16 channels）

Y

Y

N

N

N

N

Y

Y

Y

Y

Y

Y

Y

Y (Mixer)

Y

Y

Y

Y (8ch x 8Band x X)

Y (PEQ implementation)

Y

Y

Y (Mixer)

Y

Y (16 channels)

ADAMB

YSS944 YSS943 YSS940

Y

Y

Y

Y (up to 8 channels）

Y

Y

Y

Y

N

Y

Y

N

Y

N

N

Y

N

N

Y

Y

Y

Y

Y

Y

N

Y

Y

Y

Y

Y (8ch x 5Band)

Y (PEQ implementation)

Y

Y

Y

N

Y (2 channels)

EVE

YSS920B

N

N

N

Y (up to 16 channels)

N

N

N

N

N

N

Y

Y

Y

Y

Y

Y

N

Y(Channel Distributor)

Y

Y

N

Y (5ch x 3Band)

Y(2ch x 10band)

Y

N

Y

Y

N

Modification of firmware placement

Y

N

N

Multiple firmware calls

User programmability

Precision of calculations

Microcontroller interface

Y

N

Y (design with module)

N

Internal data bus:32-bit floating point (24-bit mantissa, 8-bit exponent),

Coefficient : 32-bit floating point

Four-wire serial interface

N

Y(design with assembler)

Internal data bus:32-bit floating point

(28-bit mantissa, 4-bit exponent),

Coefficient : 16-bit fixed point

Firmware download

Y

Y

Digital audio interface

24 bits (fixed) or 32 bits

(floating) × 16 channels,

TDM (4 channels or 8 channels)

is enabled

24 bits (fixed) ×8 channels

Audio data channel switching control

Y (input and output)

Y (output)

Bypass

Y

Y

User mute

Y (input and output)

Y (output)

External memory interface

N

SRAM (4Mbit)

Input delay (lip sync)

Y

Y

Output delay

Y

Y

Stream detection

N

Y

Auto mute

Y

Y

Status port

Auto mute, interrupt

Zero detection, auto mute, interrupt

General-purpose I/O ports

4

8

Internal operation clock generator

Y

Y

Power-up/power-down

Y

Y

Operation frequency

165.888 MHz

178.176MHz

Power supply voltage

1.2V (core), 3.3V (pin)

Power consumption (Typ.)

130 mW

211mW (Dolby Digital decoding)

Package

SQFP64

LQFP144

Lead-free

Y

Y

Y

24 bits (fixed) or 32 bits (floating) ×

16 channels

N

Y (realize by firmware)

Y (output)

DRAM or SRAM (4Mbit)

Y

Y

N

N

Zero detection, etc

20

Y

N

50MHz

2.5V (core), 3.3V (pin)

165mW

SQFP100

Y

[Caution]

“Dolby”, “Dolby Pro Logic II”, and “Dolby Pro Logic IIx” are trademarks of Dolby Laboratories.

“DTS”, “DTS-ES”, “DTS-96/24”, and “DTS Neo:6” are trademarks of Digital Theater Systems, Inc.

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