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Q67100-A8310 Ver la hoja de datos (PDF) - Infineon Technologies

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Q67100-A8310
Infineon
Infineon Technologies Infineon
Q67100-A8310 Datasheet PDF : 22 Pages
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SLB 0587
Application Circuit (Figure 4)
The suggested circuit design of the SLB 0587 performs the following functions:
q Current supply for the circuits (R 1, R 3, C 2, C 3, C 6, D1, D2).
q Filtered signal for synchronization of the internal time base (PLL circuit) with line frequency
(R 2, C 4).
q For specific applications C 4 and R 2 can be varied according to figure 5. An increase for C
4 and R 2 causes a slight reduction of the lamp brightness but at the same time an im-
provement of interference immunity of the internal PLL against line voltage spikes.
q Integration unit for internal PLL circuit (C 5, R 10)
Combining R 10 and C 5 (figure 6) determines within certain limits the following factors
– Start-up behaviour of internal PLL after line failure
– Ripple control behaviour (periodic shifts of lamp brightness if ripple control signals
represent)
q Protection of the user (R 8, R 9)
q Sensitivity setting of the sensor (R 7)
q Current limitation in the case of reverse polarity of the extension (R 5, R 6)
Both resistors can be omitted if no extension is connected. In this case pin 6 must be con-
nected to V SS (pin 7).
q D3: Reduction of positive voltages which may arise during the triggered state at the gate of
some triacs, to values below V DD + 0.3 V by diode forward voltage. If suitable triacs are used,
diode D3 can be omitted.
q Dr, C 1 are used for EMI suppression.
Depending on the application the EMI suppression is to be dimensioned in acc. with
VDE 0875/part 1 (general)
VDE 0550/part 6 (chokes)
or corresponding the national regulations e.g. 1.4....2 mH, Q = 11....24
Semiconductor Group
9

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