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SAA7128H

Digital video encoder

Philips Electronics 

Philips Semiconductors

Digital video encoder

Product specification

SAA7128H; SAA7129H

7.12 I2C-bus format

Table 4 I2C-bus address; see Table 5

S

SLAVE ADDRESS ACK SUBADDRESS ACK DATA 0

ACK --------

DATA n ACK P

Table 5 Explanation of Table 4

PART

S

SLAVE ADDRESS

ACK

SUBADDRESS; note 2

DATA

--------

P

DESCRIPTION

START condition

1000 100X or 1000 110X; note 1

acknowledge, generated by the slave

subaddress byte

data byte

continued data bytes and ACKs

STOP condition

Notes

1. X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.

2. If more than 1 byte DATA is transmitted, then auto-increment of the subaddress is performed.

7.13 Slave receiver

Table 6 Subaddress 26H

BIT

SYMBOL

7

WSS7

6

WSS6

5

WSS5

4

WSS4

3

WSS3

2

WSS2

1

WSS1

0

WSS0

DESCRIPTION

Wide screen signalling bits: enhanced services field.

Wide screen signalling bits: aspect ratio field.

Table 7 Subaddress 27H

BIT

SYMBOL

7

WSSON

6

−

5

WSS13

4

WSS12

3

WSS11

2

WSS10

1

WSS9

0

WSS8

DESCRIPTION

0 = wide screen signalling output is disabled; default state after reset

1 = wide screen signalling output is enabled

This bit is reserved and must be set to logic 0.

Wide screen signalling bits: reserved field.

Wide screen signalling bits: subtitles field.

2000 Mar 08

17

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