MT8910-1 Ver la hoja de datos (PDF) - Mitel Networks
Número de pieza
componentes Descripción
Fabricante
MT8910-1 Datasheet PDF : 26 Pages
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MT8910-1
Preliminary Information
Lout- 1
Lout+ 2
AVSS 3
TSTin 4
CDSTi 5
DSTi 6
VSS 7
DSTo 8
CDSTo 9
F0od 10
TSTout 11
MS0 12
MS1 13
NT/LT 14
28 Lin+
27 Lin-
26 VRef
25 VBias
24 AVDD
23 IC
22 VDD
21 MRST
20 OSC1
19 OSC2
18 F0b
17 C4b
16 SFb
15 TSTen
NC
CDSTi
NC
NC
NC
DSTi
VSS
DSTo
CDSTo
F0od
NC
6
7
5
4
3
2
1 44 43 42 41 40
39
8
38
9
37
10
36
11
35
12
34
13
33
14
32
15
31
16
30
17
29
18 19 20 21 22 23 24 25 26 27 28
NC
AVDD
NC
NC
NC
IC
VDD
MRST
OSC1
OSC2
NC
28 PIN CERDIP
Pin Description
44 PIN PLCC
Figure 2 - Pin Connections
Pin #
Name
DIP PLCC
Description
11
Lout- Line Out Minus. One of a pair of differential analog outputs for the 80 kbaud/s 2B1Q
signal, biased at VBias.
23
Lout+ Line Out Plus. One of a pair of differential analog outputs for the 80 kbaud/s 2B1Q signal,
biased at VBias.
3 5 AVSS Analog Ground. Tie to VSS.
4 6 TSTin I/O Structure Test Input. When TSTen is high, TSTin is used as a source to all output
drivers. Refer to “I/O Structure Test" in functional description for more details. Tie to VSS
for normal operation.
5 8 CDSTi Control/Data ST-BUS Input. A 2048 kbit/s serial PCM/data input for the D- and
C-channels in Dual mode. Unused in Single mode and should be connected to VSS.
6 12
DSTi Data ST-BUS Input. A 2048 kbit/s serial PCM/data input for the D-, C-, B1- and B2-
channels in Single mode. In Dual mode, only the B-channels are input.
7 13
VSS Ground.
8 14 DSTo Data ST-BUS Output. A 2048 kbit/s serial PCM/data output for the D-, C-, B1- and B2-
channels in Single mode. In Dual mode, only the B-channels are output. This output is
placed in high impedance during the unused channel times.
9 15 CDSTo Control/Data ST-BUS Output. A 2048 kbit/s serial PCM/data output for the D- and
C- channels in Dual mode. It is placed in high impedance in Single mode, and during the
unused channel times in Dual mode.
10 16
F0od Delayed Frame Pulse Output. A 244 ns wide negative going pulse indicating the end of
the active ST-BUS channel times of the device to allow for daisy-chaining of other ST-BUS
devices. Active after channel 0 in Dual Port mode and Channel 3 in Single Port Mode.
11 18 TSTout I/O Structure Test Output. When TSTen is high, the TSTout provides the output of an
XOR chain which is sourced from all digital inputs. Refer to “I/O Structure Test" in
functional description for more details. Leave unconnected for normal operation.
12 19 MS0 Mode Select 0. CMOS input. Refer to Table 1.
13 20 MS1 Mode Select 1. CMOS input. Refer to Table 1.
9-4
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